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Patent Searching and Data


Title:
INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS5853857
Kind Code:
A
Abstract:

PURPOSE: To make easy formation of substrate electrode window and prevent breakage of wiring by providing projected semiconductor substrate in the area where there is no oxide thick film and by providing the electrical elements to such projected surface and the electrode leading layer which gives a fixed potential to the substrate.

CONSTITUTION: An Si3N4 mask 22 is provided over the SiO2 thin film 21 of the p type Si 11, then the B ions are implanted thereto, the p+ layer is formed. Thenm the Si3N4 mask 24 is coated again. Thereafter, it is heated in the oxide film 12 is selectively formed. The masks 24, 22 and SiO2 film 21 in the region 11 are selectively removed, and the surface is newly covered with the oxide thin film 26. Succeedingly, the poly-Si gata electrode 28 and gate oxide film 26 are provided and the N layer 16 is formed by diffusion of phosphorus P. Next, the mask 24 on the region 25 is removed and the surface is covered with the thermal oxide film 29. Thereafter, an aperture is opened like an existing device and the Al electrode 20 is provided thereto. Thickness of the SiO2 film is almost the same in the region 11 and 27, each electrode window can be opened by the same process and is 1/2 or less than the field oxide film. Therefore, breakage of wiring does not occur at the window part. In addition, the power supply voltage can be applied to the substrate on the substrate surface and thereby operation speed of IC can be raised.


Inventors:
FUJI TATSUO
Application Number:
JP15171281A
Publication Date:
March 30, 1983
Filing Date:
September 25, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L21/822; H01L21/76; H01L27/04; H01L29/78; (IPC1-7): H01L21/76; H01L29/78
Attorney, Agent or Firm:
Uchihara Shin