To provide a chemical mechanical leveling method of a semiconductor integrated circuit which ensures dressing-free property and reduces a dishing condition.
A surface of a semiconductor substrate of the semiconductor integrated circuit comprises a wiring layer having a surface composed of copper containing metal, and a conductive barrier layer formed so as to coat an insulating layer. In the chemical mechanical leveling method thereof the surface of the semiconductor substrate is polished by use of a metal polishing agent. A polishing pad composed of a nonwoven fabric which contains a soft resin having bubbles interconnecting in a thickness direction thereof and hard resin particles scattered in the soft resin is used, and also, the metal polishing agent containing respective components (a)-(e) described below is used. The component (a) is silicon oxide in which an average particle size calculated by a laser diffraction scattering method is 60-150 nm, the component (b) is silicon oxide in which the average particle size calculated by the laser diffraction scattering method is 10-50 nm, the component (c) is at least one kind selected from carboxylic acid and α-amino acid, the component (d) is heterocyclic compound; and the component (e) is an oxidizing agent.
Kato Kazunori
Katsuichi Nishimoto
Hiroshi Fukuda