Title:
CIRCUIT DEVICE FOR DATA LANGUAGE CONVERSION
Document Type and Number:
Japanese Patent JPH03184425
Kind Code:
A
Abstract:
PURPOSE: To make it possible to process a data word at a high data rate by dividing a data word to be converted into sections shorter than the length of the data word and corresponding to the bit length of a shift register by the use of a progress control part and successively converting the data word in the shift register. CONSTITUTION: A data word applied to parallel data terminals DP1 to DPn each of which has the number of data lines corresponding to the length of a register is transferred to registers Reg1 to Regn at first. The successive transfer of data from the registers Reg1 to Regn to an S/P-P/S converter through a data bus DB is controlled and the data are outputted from the converter to a series data terminal DSO in each bit based on a clock CLK. Only a part of all data word length to be converted is processed by a high speed clock signal CLK.
Inventors:
RUDEI MIYURAA
Application Number:
JP28409090A
Publication Date:
August 12, 1991
Filing Date:
October 22, 1990
Export Citation:
Assignee:
SIEMENS AG
International Classes:
H03M9/00; (IPC1-7): H03M9/00
Attorney, Agent or Firm:
Tomimura Kiyoshi