ANALOG/DIGITAL CONVERTER CIRCUIT

Japanese Patent JPH02186719

A

PURPOSE: To improve S/N to reduce the noise by providing a difference means, an integral means, a differential means, a quantization device, etc., which compare an analog input signal and a feedback signal with each other to give an output dependent upon the difference between both signals. CONSTITUTION: The analog input signal is inputted to an integrator 22 and a quantization device 24' through a difference circuit 20, and the input signal is digitized, and an output signal A1 (z) is fed back to the circuit 20 through a feedback loop 32 and a delay device 26 together with a noise q1 (z). Next, the output of the integrator 22 is inputted to the integrator 22 through the difference circuit 20 of a circuit 80 and is outputted to a circuit 90. The circuit 90 receives the input from the circuit 80, and the output is coupled with the delay part of an omission error signal T2 (z) of the circuit 80 by an addition circuit 92, and the output of the circuit 92 is coupled with the delay part of an omission error signal of the preceding stage by an addition circuit 94. They are differentiated by differential circuits 96 and 98, and other signals from circuits 80 and 76 are added, and results are inputted to an addition circuit 78 to output a signal y(z). Thus, the noise is reduced with a low cost.

JP7380688	A/D conversion circuit
JP2520268	[Name of device] Digital audio device
JPH04261223	ANALOG-TO-DIGITAL CONVERTER MINIMIZING QUASI-STABLE STATE

TOOMASU KAUTSU RESURII

JP22848189A

July 23, 1990

September 05, 1989

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PLESSEY OVERSEAS

H03M1/08; H03M3/04; (IPC1-7): H03M1/08

Akira Asamura (2 outside)

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