To provide a DC-DC converter obtaining output voltage stable with a small ripple.

A switch SW is driven in accordance with a condition of a flip flop 101. An error amplifier 102 outputs a command value signal Icnt determined in accordance with output voltage Vout. A comparator 103 outputs a reset signal A when an inductor current 11 leads to the command value signal Icnt. An oscillator 104 generates a set pulse. An AND gate 1 gives a logical product of an output Q of the flip flop 101 and the reset signal A as a reset signal B to a reset terminal of the flip flop 101 and a negative logical input terminal of an AND gate 105. The AND gate 105 gives the set pulse to a set terminal of the flip flop 101 in accordance with the reset signal B.