PURPOSE: To eliminate the need for a ROM or a PLA from a decoder by using an error location polynomial of S1x2+S21+S31+S3 so as to eliminate the need for the operation of the term S3/S1.

CONSTITUTION: A reception series is fed to S1, S3 calculation circuits 2, 3 to generate syndromes S1, S3. the syndromes S2, S3 are fed to S21, S33 calculation circuits 5, 6 and an operation circuit 7, from which coefficients of the error location polynomial σ(x)=S1x2+S21x+S31+S are detected. The coefficients are fed to a chain search circuit 8. The syndromes S1, S3 are selected from the reception series by switch circuits 11, 14 and inputted to an adder circuit 15 via an operation circuit 9 multiplying α-2, α-1 to operate the σ(x). When the output of the circuit 15 is zero, it is detected by a zero detection circuit 16 to generate a correction signal, which is ANDed by an output of a latch 4A, and the result inverts bits of the reception series from a shift register 19. the corrected data series is outputted from an output terminal 20.