PURPOSE: To perform high speed image reading and to process signals so as to easily utilize an image sensor outputting plural signals divided by an image area in parallel.

CONSTITUTION: A signal processing circuit synthesizes four sets of signals into single image signal through the use of the image sensor 20 outputting a four- parallel signal divided by the odd/even numbers and the area of the list of picture elements by respectively using CCD. After synthesizing the signals of the odd/even numbers by an analog signal, they are ADD-converted and the signals of respective areas are written in FIFO memories 71 and 72 which are respectively independent to read in the order of the list of the area. Otherwise, the four-sets of signals after respective A/C conversion are respectively written in the four FIFO memories 71 and 72 and at the time of reading, they are read in the order corresponding to the list of odd/even numbers and that of the area.