Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3286920
Kind Code:
B2
Abstract:
PURPOSE: To easily obtain an epitaxial layer wherein it is effective to reduce the problem of a mutual electric interference between elements as a problem in an integrated circuit device such as a HEMT, a MESFET or the like, especially a side-gate effect, and it can be realized with good controllability.
CONSTITUTION: A silicon nitride film 2 is formed on a GaAs substrate 1; a patterning operation is then performed; the GaAs substrate 1 at the substratum is exposed selectively; an undoped GaAs buffer layer 3 is formed on the whole surface so as to be a thickness exceeding the spread layer thickness of a depletion layer caused by a level generated at the interface between the GaAs substrate 1 and the undoped GaAs buffer layer grown on it as well as at the interface between the silicon nitride film 2 and the undoped GaAs buffer layer covering it; a semiconductor laminated body including at least, e.g. an undoped GaAs electron traveling layer is formed on the whole surface on it; an electrode is formed on the semiconductor laminated body.
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Inventors:
Junji Saitoh
Application Number:
JP18340892A
Publication Date:
May 27, 2002
Filing Date:
July 10, 1992
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L21/20; H01L21/203; H01L21/205; H01L21/338; H01L29/10; H01L29/778; H01L29/812; (IPC1-7): H01L21/20; H01L21/203; H01L21/338; H01L29/778; H01L29/812
Domestic Patent References:
| JP3247597A | ||||
| JP1170015A |
Attorney, Agent or Firm:
Shoji Kashiwaya (1 person outside)