To solve such a problem that in a semiconductor integrated circuit in which a logic circuit and a memory circuit are mixed, when area of the memory circuit is large, uselessness is caused in layout, chip area is increased, and chip cost is increased.
A memory circuit 10 is provided with a feed through input terminal 13 for inputting a signal other than a signal inputted when read-out or write-in is performed for a memory cell, an intermediate buffer circuit 14 relaying a signal inputted from the feed through input terminal, and a feed through output terminal 15 for outputting the signal relayed by the intermediate buffer circuit 14. the feed through input terminal 13 and intermediate buffer circuit 14, and the intermediate buffer circuit 14 and the feed through output terminal 15 are connected by wiring used when read-out and write-in are performed for the memory cell and feed through wiring 16, 17 being not connected to the memory cell.
AKAMATSU HIRONORI
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