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Patent Searching and Data


Title:
NONVOLATILE SEMICONDUCTOR STORAGE
Document Type and Number:
Japanese Patent JP2000040380
Kind Code:
A
Abstract:

To inspect with a repeat of a simple pattern or a less test pattern input by dividing a data latch circuit to one or plural groups, using the data latch circuits of respective bit lines and constituting a shift register at every group.

The data latch circuits 221-223 are constituted of two inverter circuits. A signal inverted on every other piece is inputted to a data transfer circuit. When a data transfer signal CK is in H, the data transfer circuit 212 connecting the mth column data latch circuit 222 with the (m+1)th column data latch circuit 223 is turned on, and the data latched to the mth column data latch circuit 222 are transferred to the (m+1)th column data latch circuit 223. The data latch circuits 221-225 are divided into an odd bit line column group and an even bit line column group, and the shift register is constituted. By only controlling a shift register data transfer signal, the write-in data are fetched to a data latch circuit memory cell.


Inventors:
NATORI KANJI
Application Number:
JP20565498A
Publication Date:
February 08, 2000
Filing Date:
July 21, 1998
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
G11C16/02; (IPC1-7): G11C16/02
Attorney, Agent or Firm:
鈴木 喜三郎 (外2名)