To provide a semiconductor IC(integrated circuit) which can perform a stable operation against the rise of temperature and the drop of power supply voltage.

A delayed clock signal DCK which passed through a delay circuit 11 is held by a clock signal CK that is directly given and the timing comparison is carried out between both clock signals at an FF 12 of a detection circuit 10. If the delay time of the signal DCK exceeds a prescribed time due to the rise of temperature or the drop of power supply voltage, a detection signal DET is outputted. Thus, a selector 22 switches the clock signal CLK given to an internal circuit 30 to a clock signal CKb that is divided by a frequency divider 21. As a result, the heat generation of the circuit 30 is suppressed to drop the temperature against the rise of temperature. Then a stable operation is possible for a semiconductor IC owing to its slow operation when the power supply voltage drops.