To achieve capacity increase and miniaturization of on-chip nonvolatile memory which is utilized to store data and programs.
This semiconductor processor has a first nonvolatile memory (21) in which memory information is erased in first data length; a second nonvolatile memory (22) in which memory information is erased in second data length; and a CPU (2). The first nonvolatile memory is used to store an encryption key to be used for encryption of data and the second nonvolatile memory is used to store a program which the CPU should process. Since the nonvolatile memory is divided into two parts for storing programs and for storing encryption keys and the data length of erasure unit of memory information to each nonvolatile memory is specified separately, the efficiency of erasure of memory information before write processing of program can be increased and erasure of memory information can be performed according to the data length of required processing unit in writing the encryption key to be utilized for arithmetic operation of the CPU.
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YAMAZOE TAKANORI
KATAYAMA KOZO
TANAKA TOSHIHIRO
SHINAGAWA YUTAKA
WATASE HIROSHI
KANAI TAKEO
NAGASAKI NOBUTAKA
HITACHI ULSI SYS CO LTD
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