To provide a signal processor which can simplify circuit configuration without changing clock frequency dynamically during reproduction.
When an instruction to start audio reproduction is input from an input device 6, a storage device control section 13 acquires track information of audio data from a storage device 3. A clock determination section 12 analyzes the transferred track information, and selects a clock frequency corresponding to the data format. A clock generation section 11 generates and output the clock signal by changing the clock frequency into the selected clock frequency. The storage device control section 13 acquires the audio data of the track to be reproduced from the storage device 3, and an audio reproduction section 14 decodes this audio data and generates an audio signal, and outputs it to an audio output unit 2.
NAKAHARA MITSUNARI
SATO TAKESHI
JP2006147134A | 2006-06-08 | |||
JP2006073079A | 2006-03-16 | |||
JP2004103126A | 2004-04-02 |
Toshimitsu Ichikawa
Kimihide Hashimoto