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Patent Searching and Data


Title:
TIMING CONTROL CIRCUIT AND IMAGE DISPLAY DEVICE
Document Type and Number:
Japanese Patent JPH08330947
Kind Code:
A
Abstract:

PURPOSE: To provide a display control circuit which compensates the temperature dependency of a voltage control oscillator and can acquire a stable sampling signal.

CONSTITUTION: A display control circuit 20 is provided with a PLL circuit which includes a phase detection circuit 2. an LPF 3, a voltage control oscillator 1 which produces a sampling signal, and a dividing circuit 4 which sends a dividing signal of the sampling signal to the circuit 2 and detects a phase difference between the dividing signal and a horizontal synchronizing signal. Furthermore, an up-down counter 5 is added to detect the phase difference value between the horizontal synchronizing signal and the dividing signal, together with a comparator 6 which compares the phase difference value detected by the counter 5 and the set value, and a voltage correction circuit 7 which adds the bias voltage to the phase difference signal in order to correct the fluctuation of frequency due to the temperature change of the sampling signal based on the comparison result of the comparator 6.


Inventors:
KASHIYAMA SHUNJI
Application Number:
JP13022895A
Publication Date:
December 13, 1996
Filing Date:
May 29, 1995
Export Citation:
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Assignee:
CASIO COMPUTER CO LTD
International Classes:
H04N5/06; H03L1/02; H03L7/08; H04N5/66; (IPC1-7): H03L1/02; H03L7/08; H04N5/06; H04N5/66
Attorney, Agent or Firm:
Takeshi Nara