PURPOSE: To protect a frame synchronizing signal in an optimum state, by switching the number of protection frames in response to the state of supply of a signal including a frame synchronizing pattern and a digital signal.

CONSTITUTION: An FF33 is reset at all times by a detected output of a synchronism detecting circuit 32 when a synchronizing pattern detecting signal is to be accommodated in a window pulse, and the number of protection frames N detected at a protection frame number detecting circuit 37 is set to, e.g., 13. Then, since a synchronizing signal protector 31 protects the synchronizing signal with a comparatively large number, 13 in this case, of the protection frame number N, the optimum operation to prevent adverse effect due to the generation of random error, etc. is attained.