Title:
CAPACITOR ARRAY, COMPOSITE ELECTRONIC COMPONENT, METHOD FOR MANUFACTURING CAPACITOR ARRAY, AND METHOD FOR MANUFACTURING COMPOSITE ELECTRONIC COMPONENT
Document Type and Number:
WIPO Patent Application WO/2019/239937
Kind Code:
A1
Abstract:
This capacitor array comprises a first sheet-form sealing layer, a second sheet-form sealing layer, and a plurality of solid electrolytic capacitor elements. Each of the plurality of solid electrolytic capacitor elements has a first main surface and a second main surface facing each other in the thickness direction, and comprises an anode plate comprising a valve action metal, a porous layer provided on at least one main surface of the anode plate, a dielectric layer provided on the surface of the porous layer, and a solid-electrolyte-layer-containing cathode layer provided on the surface of the dielectric layer. The first main surface side of each of the solid electrolytic capacitor elements is disposed on the first sealing layer, and the second sealing layer is disposed so as to cover, from the second main surface side, the plurality of solid electrolytic capacitor elements on the first sealing layer.
Inventors:
FURUKAWA TAKESHI (JP)
MIYAKE MISATO (JP)
MIYAKE MISATO (JP)
Application Number:
PCT/JP2019/021936
Publication Date:
December 19, 2019
Filing Date:
June 03, 2019
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G4/38; H01G2/02; H01G4/40; H01G9/048; H01G9/08
Domestic Patent References:
| WO2003107367A1 | 2003-12-24 |
Foreign References:
| JP2007266247A | 2007-10-11 | |||
| JP2004288793A | 2004-10-14 |
Attorney, Agent or Firm:
YASUTOMI & ASSOCIATES (JP)
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