Title:
CAPACITOR ARRAY STRUCTURE, MANUFACTURING METHOD THEREFOR, AND SEMICONDUCTOR STORAGE DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/062545
Kind Code:
A1
Abstract:
A capacitor array structure manufacturing method, a capacitor array structure, and a semiconductor storage device. The manufacturing method comprises: providing a substrate; forming a capacitor structure on the substrate, in which the step comprises forming a lower electrode layer on the substrate, forming a capacitor dielectric layer on a surface of the lower electrode layer, and forming an upper electrode layer on a surface of the capacitor dielectric layer, wherein a gap is present between the upper electrode layers; forming a filler layer to fill the gap; and forming a covering layer to cover the filler layer and the upper electrode, wherein the covering layer and the filler layer are combined to form an upper electrode conductive layer. Materials of the filler layer and the covering layer comprise doped polysilicon, and a volume concentration of doped germanium atoms in the covering layer is greater than a volume concentration of doped germanium atoms in the filler layer. The capacitor array structure manufacturing method in the present disclosure reduces slits in the upper electrode conductive layer.
Inventors:
LI XIUSHENG (CN)
Application Number:
PCT/CN2021/103744
Publication Date:
March 31, 2022
Filing Date:
June 30, 2021
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L27/108; H01L21/8242
Foreign References:
| CN108155152A | 2018-06-12 | |||
| CN111326513A | 2020-06-23 | |||
| CN107968044A | 2018-04-27 | |||
| CN107910327A | 2018-04-13 | |||
| CN101101922A | 2008-01-09 | |||
| US20050064660A1 | 2005-03-24 | |||
| CN102487073A | 2012-06-06 |
Other References:
See also references of EP 4199086A4
Attorney, Agent or Firm:
BEIJING INTELLEGAL INTELLECTUAL PROPERTY AGENT LTD. (CN)
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