Title:
HETEROSTRUCTURE FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING IT
Document Type and Number:
WIPO Patent Application WO2001097274
Kind Code:
A3
Abstract:
A method of manufacturing a semiconductor component includes providing a substrate (110) with a surface (119), providing a layer (120) of undoped gallium arsenide over the surface of the substrate, forming a gate contact (210) over a first portion of the layer, and removing a second portion of the layer.
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Inventors:
PEATMAN WILLIAM C
JOHNSON ERIC S
REYES ADOLFO C
JOHNSON ERIC S
REYES ADOLFO C
Application Number:
PCT/US2001/015049
Publication Date:
April 11, 2002
Filing Date:
May 10, 2001
Export Citation:
Assignee:
MOTOROLA INC (US)
International Classes:
H01L29/812; H01L21/337; H01L21/338; H01L29/778; H01L29/80; H01L29/20; (IPC1-7): H01L21/337; H01L29/80
Foreign References:
| US5701019A | 1997-12-23 | |||
| US5331185A | 1994-07-19 | |||
| US5937285A | 1999-08-10 |
Other References:
PATENT ABSTRACTS OF JAPAN vol. 012, no. 153 (E - 607) 11 May 1988 (1988-05-11)
PATENT ABSTRACTS OF JAPAN vol. 011, no. 077 (E - 487) 7 March 1987 (1987-03-07)
BOISSENOT P ET AL: "A O.4-UM GATE-LENGTH AIGAAS/GAAS P-CHANNEL HIGFET WITH 127-MS/MM TRANSCONDUCTANCE AT 77 K", IEEE ELECTRON DEVICE LETTERS, IEEE INC. NEW YORK, US, vol. 11, no. 7, 1 July 1990 (1990-07-01), pages 282 - 284, XP000133224, ISSN: 0741-3106
PATENT ABSTRACTS OF JAPAN vol. 011, no. 077 (E - 487) 7 March 1987 (1987-03-07)
BOISSENOT P ET AL: "A O.4-UM GATE-LENGTH AIGAAS/GAAS P-CHANNEL HIGFET WITH 127-MS/MM TRANSCONDUCTANCE AT 77 K", IEEE ELECTRON DEVICE LETTERS, IEEE INC. NEW YORK, US, vol. 11, no. 7, 1 July 1990 (1990-07-01), pages 282 - 284, XP000133224, ISSN: 0741-3106
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