Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR WAFER
Document Type and Number:
WIPO Patent Application WO/2004/068569
Kind Code:
A1
Abstract:
A method for manufacturing a semiconductor wafer is disclosed which comprises at least a final polishing step wherein final polishing is conducted by turning a polishing cloth attached onto a polishing plate while supplying an abrasive to the polishing cloth and bringing a semiconductor wafer into sliding contact with the polishing cloth and a cleaning step wherein the polished semiconductor wafer is put into a cleaning bath and cleaned. In this method, the semiconductor wafer is put into the cleaning bath within 40 seconds after the final polishing is finished, or the polished semiconductor wafer is showered with water spray or showered at a low pressure and then put into the cleaning bath with its surface covered with the abrasive. With this method, adhesion of particles to the surface of a semiconductor wafer such as a silicon wafer can be reduced and local etching of a wafer can be prevented.
More Like This:
Inventors:
NAKAJIMA YUKIO (JP)
KIDA TAKAHIRO (JP)
OKADA MAMORU (JP)
KIDA TAKAHIRO (JP)
OKADA MAMORU (JP)
Application Number:
PCT/JP2004/000679
Publication Date:
August 12, 2004
Filing Date:
January 27, 2004
Export Citation:
Assignee:
SHINETSU HANDOTAI KK (JP)
NAKAJIMA YUKIO (JP)
KIDA TAKAHIRO (JP)
OKADA MAMORU (JP)
NAKAJIMA YUKIO (JP)
KIDA TAKAHIRO (JP)
OKADA MAMORU (JP)
International Classes:
B08B3/04; H01L21/304; H01L21/306; (IPC1-7): H01L21/304
Foreign References:
JPH1074716A | 1998-03-17 | |||
JPH07201786A | 1995-08-04 | |||
JPH1098017A | 1998-04-14 | |||
JPH07263387A | 1995-10-13 |
Attorney, Agent or Firm:
Yoshimiya, Mikio (6-4 Motoasakusa 2-chom, Taito-ku Tokyo 41, JP)
Download PDF: