Title:
METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2024/052774
Kind Code:
A1
Abstract:
The present invention provides a semiconductor device which enables the achievement of miniaturization or high integration. According to the present invention, a second layer, a mask and a first resist mask are sequentially formed on a first layer; the first resist mask is provided with a first opening part; the size of the first opening part in a plan view is reduced; the mask is provided with a second opening part in a position where the second opening part overlaps with the first opening part; the first resist mask is removed; a second resist mask is formed on the mask, which has been provided with the second opening part; the second resist mask is provided with a third opening part; the size of the third opening part in a plan view is reduced; the mask is provided with a fourth opening part in a position where the fourth opening part overlaps with the third opening part but does not overlap with the second opening part; the second resist mask is removed; the second layer is provided with fifth opening parts in positions where the fifth opening parts respectively overlap with the second opening part and the fourth opening part; the mask is removed; and an oxide semiconductor, which is in contact with the lateral surface of the second layer and the upper surface of the first layer, is formed within the fifth opening parts.
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Inventors:
MIYAIRI HIDEKAZU (JP)
YAMAZAKI SHUNPEI (JP)
YAMAZAKI SHUNPEI (JP)
Application Number:
PCT/IB2023/058644
Publication Date:
March 14, 2024
Filing Date:
September 01, 2023
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H10B53/20; H01L21/336; H01L21/822; H01L21/8234; H01L27/04; H01L27/06; H01L27/088; H01L29/786
Foreign References:
| JP2005150494A | 2005-06-09 | |||
| JP2018149552A | 2018-09-27 | |||
| JP2010192825A | 2010-09-02 | |||
| JP2017168764A | 2017-09-21 | |||
| JP2000349301A | 2000-12-15 |
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