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Title:
OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2011/065329
Kind Code:
A1
Abstract:
It has been known that the electrical characteristics of oxide semiconductor TFTs strongly depend on channel film thickness, and there has been no method for relaxing the dependency on the channel film thickness, and there has been no method for providing, on a large-area substrate, a semiconductor device having a small characteristic variance, either. Disclosed is a method which includes steps wherein: a gate electrode is formed on an insulating substrate; a first semiconductor layer, which contains an indium oxide as a main component, and has a film thickness of 5 nm or more, is formed on the gate electrode with a gate insulating film therebetween; a second semiconductor layer, which does not contain indium but contains an oxide of zinc and/or tin as a main component, and has a film thickness of 5-50 nm, is formed on the first semiconductor layer; and the source electrode and the drain electrode are formed on the second semiconductor layer. Thus, the semiconductor device, which has a small dependence on semiconductor layer film thickness and has a small characteristic variance is provided on a large-area substrate by combining the material of the first semiconductor layer and that of the second semiconductor layer.

Inventors:
WAKANA HIRONORI (JP)
KAWAMURA TETSUFUMI (JP)
UCHIYAMA HIROYUKI (JP)
FUJII KUNIHARU (JP)
Application Number:
PCT/JP2010/070816
Publication Date:
June 03, 2011
Filing Date:
November 22, 2010
Export Citation:
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Assignee:
HITACHI LTD (JP)
WAKANA HIRONORI (JP)
KAWAMURA TETSUFUMI (JP)
UCHIYAMA HIROYUKI (JP)
FUJII KUNIHARU (JP)
International Classes:
H01L29/786
Domestic Patent References:
WO2009034953A12009-03-19
Foreign References:
JP2009278115A2009-11-26
JP2009224479A2009-10-01
JP2009170905A2009-07-30
Attorney, Agent or Firm:
TSUTSUI, YAMATO (JP)
Tsutsui Daiwa (JP)
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