Title:
PHASE-LOCKED LOOP WITH HIGH BANDWIDTH USING RISING EDGE AND FALLING EDGE OF SIGNAL
Document Type and Number:
WIPO Patent Application WO/2017/065510
Kind Code:
A1
Abstract:
Disclosed is a phase-locked loop having a high bandwidth using the rising edge and falling edge of a signal. The disclosed phase-locked loop controls the frequency of a voltage controlled oscillator by comparing both a phase difference between the rising edges of a reference signal and a feedback signal, and a phase difference between the falling edges thereof.
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Inventors:
YOO CHANG SIK (KR)
LIM BAEK JIN (KR)
LIM BAEK JIN (KR)
Application Number:
PCT/KR2016/011470
Publication Date:
April 20, 2017
Filing Date:
October 13, 2016
Export Citation:
Assignee:
INDUSTRY-UNIV COOP FOUND HANYANG UNIV (KR)
International Classes:
H03L7/089; H03L7/093; H03L7/099
Domestic Patent References:
| WO2003061130A1 | 2003-07-24 |
Foreign References:
| KR20110078477A | 2011-07-07 | |||
| KR20100137838A | 2010-12-31 | |||
| US20070082635A1 | 2007-04-12 | |||
| JP2007116488A | 2007-05-10 |
Attorney, Agent or Firm:
SONG, In-Ho (KR)
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