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JP4308211B2 |
The invention provides a spread spectrum communication system for maintaining an initial transmit power level of a communication station during periods of inactivity. The system comprises a first station (501) and a second station (502),...
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JP4308955B2 |
A filter device includes a first section for receiving data of a desired cutoff frequency. A second section operates for deciding whether the desired cutoff frequency is in a predetermined low frequency band or a predetermined high frequ...
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JP4309112B2 |
The digital filter (FLT) receives an input signal (INPUT(G)) including possible voltage peaks or glitches from a square-wave clock signal generator (CLK), and comprises a delay line (T) producing a delayed digital signal (INPUT(G)+ delta...
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JPWO2007102611A1 |
The first FIR filter 10 having a numerical sequence consisting of the ratio of "-α, α, β, β, α, -α" (α is an emphasis coefficient and β is a fixed value) as a filter coefficient, and an even number of tap lengths. In the case of,...
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JP2009527206A |
Techniques are described for sampling rate conversion in the digital domain by up-sampling and down-sampling a digital signal according to a selected intermediate sampling frequency. A prototype anti-aliasing filter that has a bandwidth ...
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JP4300273B2 |
A filter circuit is composed of FIR filters, and the filter factor is of a symmetrical type, thereby realizing a linear phase characteristic and preventing phase distortion even if a desired frequency band is emphasized. The first filter...
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JP4300272B2 |
A method for designing a digital filter for outputting a signal that is the sum of the products of multiplication of the signals at the taps of delay units (11-16) by the filter factors given by factor units (21-25), several times of the...
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JP4297573B2 |
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JP4295234B2 |
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JP4295428B2 |
A finite impulse response filter is disclosed which separately receives input data consisting of transmitting information and composed of bit strings, and additional data which is added in order to transmit the input data. The present in...
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JP2009152682A |
To reduce a phase error of a multi-phase clock occurring in processes of generation and transmission of the multi-phase clock.A phase-difference smoother has as same number of phase filter circuits as the number of phases of a multi-phas...
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JP2009152815A |
To make the timing control of a digital filter readily variable.A digital filter circuit includes a multiplier 20 and an adder 22 performs filter processing, by performing the time division operation of the multiplier 20 and the adder 22...
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JP4291829B2 |
In a programmable logic device having dedicated multiplier circuitry, some of the scan chain registers normally used for testing the device are located adjacent input registers of the multipliers. Those scan chain registers are ANDed wit...
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JP4293639B2 |
A digital finite impulse response bandpass filter is described. Analog to digital conversion (A/D) of an input signal uses a Sigma-Delta ( SIGMA - DELTA ) converter, resulting in a digital sequence representation of the input signal. A l...
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JP4292327B2 |
To provide a speaker array and a microphone array for improving directivity in the low-pitched sound zone of a speaker array or a microphone array without lengthening array length, and for preventing the increase of the level of a side-l...
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JP4290783B2 |
The circuit reduces the data rate of a data sequence (d1) using a switchable filter (1) which delivers a first output (dn) after a samples when in a first switching state, and delivers a second output (dm) after a+1 samples in a second s...
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JP4286998B2 |
To make reduction in power consumption by decreasing mis-detection of a peak position due to thinning of samples compatible with maintenance of a synchronization detection characteristic. After thinning samples of a digital received sign...
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JP2009141445A |
To convert a sampling rate suitably by small scale signal processing.Output data having a converted sampling rate are generated by using a first operating section (odd-number tap symmetry filter) for receiving data of a digital signal an...
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JP4282286B2 |
In a digital filter device which filters a plurality of signals by a single digital filter, an input data memory stores the input data strings generated by computing processors, and a digital filter reads the input data strings in a pred...
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JP4277333B2 |
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JP4275764B2 |
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JP4275855B2 |
The invention relates to the coding of speech at a variable bit rate, whereby the bit rates can vary from frame to frame, and more specifically to the methods and filters used for improving the quality of the decoded speech. In the solut...
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JP4276258B2 |
Systems and methods for converting a digital input data stream from a first sample rate to a second, fixed sample rate using a combination of hardware and software components. In one embodiment, a system includes a rate estimator configu...
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JP2009124306A |
To reduce the circuit scale of a high speed digital filter which executes the product sum operation of arbitrary coefficients with data successively input synchronously with a clock as an object, and to reduce power consumption.The produ...
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JP4273323B2 |
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JP4267078B2 |
A filterbank structure is provided which provides a flexible compromise between the conflicting goals of processing delay, filter sharpness, memory usage and band interaction. The filterbank has an adjustable number of bands and a stacki...
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JP4267293B2 |
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JP2009110262A |
To identify a spike noise 212, and to detect and remove the spike noise 212 with respect to time-series data.An analytic matrix generation part 120 sets a plurality of reference records 221 extracted from reference data 220 and one recor...
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JP4265119B2 |
A digital filter 10 comprising a backward filter 12 for inputting a discrete signal S1 and a filter coefficient S14 and outputting a post-backward-filter signal S12 and a forward filter 13 for inputting the post-backward-filter signal S1...
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JP2009105725A |
To conduct a high-speed filter operation.A plurality of filter components and respective weights thereof are used to set a filter (S20), filter operation target data to be a target of a filter operation are inputted (S22), total amounts ...
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JP4263586B2 |
A digital filter (2) comprising delay elements (D 0 - D m-1 ), multipliers (MP 0 - MP m ), and an adder (ADD), receives a digitized FM or phase modulated signal as its input (Xin(t)), and generates an output signal (Y(t)). A unit (3) det...
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JP4262411B2 |
A method for compensation of phase delays that occur in discrete sampling of an analog output signal (US) has the steps of subjecting the output signal (US) to signal processing by an anti-aliasing filter and then by a sampling member to...
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JP2009100357A |
To provide a waveform equalizer for actualizing a reduced circuit scale, compared with conventional one.A filter part 11 uses a delay device group 111 consisting of (k-1) pieces of delay devices 1111-111k-1 connected in series to one ano...
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JP4258479B2 |
An apparatus is provided for controlling a graphic equalizer which is implemented by digital filters, each being assignable to a frequency band for regulating a level of the frequency band. In the apparatus, a set of control devices are ...
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JP4258545B2 |
A digital low-pass filter includes: a first subtracter that subtracts a first feedback term from an input; a first multiplier that multiplies an first subtracter output by a constant k1; a first delay unit that delays an input by a prede...
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JP4259626B2 |
The equaliser has n frequency regions for digitised signals. A desired amplitude characteristic is set up using n-1 cascaded digital low and high pass filter circuits (F1,F2) whose selection edges define the frequency boundaries between ...
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JPWO2007043124A1 |
For the purpose of improving the calculation accuracy of the tap coefficient and increasing the equalization ability of the equalizer, the equalizer 1 uses the means 2 for calculating the tap coefficient for each symbol interval and the ...
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JP2009081851A |
To provide a method of identifying an unknown system with which a convergence time is made shorter than that in the prior art, in the method being adapted to identify an unknown system using an IIR type filter or a filter structured clos...
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JP4251094B2 |
In an asynchronous data input apparatus, a writing section writes data successively into a FIFO buffer memory at an variable input rate so that the data are accumulated in the FIFO buffer memory. A reading section reads the accumulated d...
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JP4251137B2 |
An analog/digital converter (8) quantizes a signal reproduced by recording medium. A portion of quantized signal is transmitted to an integrator (20) having first order infinite impulse response (IIR) filter (23) and amplifier (21). Anot...
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JP4249414B2 |
The present invention relates to an interpolation method and an interpolation apparatus for a digital audio signal or a digital image signal that has a predetermined sampling cycle and quantization bit length, and in particular, to an in...
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JP4249425B2 |
An interpolator includes a half band filter, a first polyphase filter, a second polyphase filter and a linear interpolation filter. The polyphase filters, respectively, interpolate before and after an interpolation instant (Delta)t/Tr1) ...
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JP4246562B2 |
An adaptive filter for an FM receiver comprises a digital filter (110), an error detection section (150,180) for detecting an error err (t-n) between the output amplitude Yenv (t-n) of the digital filter and a reference value Yth, and a ...
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JP2009065622A |
To provide a sampling conversion device capable of sampling-converting input data and outputting the resulting data, so as to be in synchronism with the clock that has a frequency different from that of an input clock, and reducing the e...
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JP2009065515A |
To provide a digital filter which reduces a power consumption for computation at a low accuracy.The digital filter includes: a gate part 109 for inputting a lower bit of input data and a control signal; a gate part 110 for inputting a lo...
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JP4242362B2 |
A signal-processing device includes an analog-to-digital converter for the generation of a digital input signal from an analog input signal, an intermediate memory for the intermediate storage of the digital input signal and a digital si...
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JP4243877B2 |
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JP4244897B2 |
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JP4245227B2 |
A digital matched filter has a serial-to-parallel conversion circuit that converts input data fed thereto in serial form into n sets of parallel data and a plurality of delay circuits that each output serial data fed thereto with a delay...
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JP4243473B2 |
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