| Document |
Document Title |
|
JP2641442B2 |
|
|
JPH09200099A |
To prevent the same data from being written in plural data carriers by detecting that plural data carriers are in existence in a communication area. A diameter of a transmission coil L1 is selected smaller than a diameter of a reception ...
|
|
JP2633058B2 |
|
|
JPH09186570A |
To reduce the oscillation of a current in the case of current path switching without increasing the number of stages of transistors(TRs) between power wires. In either of two on/off states of a couple of differential TR switches 22A, 22B...
|
|
JP2627890B2 |
|
|
JP2626191B2 |
|
|
JP2621884B2 |
In successive information trains serially coded each information bit is transmitted during a determined time interval, at least one level change appearing for each bit during this time interval, wherein, during the encoding, each informa...
|
|
JP2618632B2 |
|
|
JP2620484B2 |
PURPOSE: To improve recording efficiency by recording both mark and space signal on a disk as variable length signals corresponding to a code block of a compressed digital video signal. CONSTITUTION: A formatter 27 compresses a digital v...
|
|
JPH09153260A |
To select the interval of code transition matched with the noise of an electronic medium and jitters and to provide a high encoding rate by repeatedly encoding the input string of binary data corresponding to a run length selection means...
|
|
JPH09153809A |
To ensure perfect decoding at high speed by simultaneously decoding a first bit and a low-order 10-bit. A positive second 10-bit and 10/8-bit decoder 520 is used for decoding the second 10-bit of 20-bit data (low-order 10-bit when there ...
|
|
JPH09153201A |
To provide the digital data recording device in which the recording density is greatly improved. The digital data supplied from an input terminal 3 are supplied to a multilevel processing circuit 4 and become multilevel data. The data ar...
|
|
JP2616395B2 |
PURPOSE: To perform switching of a reference clock or the like before expansion of the influence of disturbance to a circuit in the succeeding stage by detecting the disturbance of a bipolar clock without using a phase locked oscillation...
|
|
JP2615588B2 |
|
|
JP2615566B2 |
|
|
JP2614206B2 |
|
|
JPH09139628A |
To minimize the production of undesired noise component and to attain a long service life for the device. The device is provided with plural waveform operation means 15-18 operating a waveform of a signal of a prescribed waveform and wit...
|
|
JPH09135172A |
To permit circuit configuration to be a small scale by making a conversion table small at the time of uniquely converting n(n>m) bit code into m-bit data. A status bit indicating whether or not the succeeding bit code of an n-bit code to...
|
|
JPH09130264A |
To improve the transmission speed and the utilizing efficiency by mapping a sequence of user bits into a code word not including zero and storing the result to a magnetic medium so as to reduce a loss in the timing and the gain parameter...
|
|
JPH09130257A |
To generate a channel-coded binary signal by inserting a bit pattern to provide a synchronization function into a signal and modifying a bit pattern before an optimum code word is discriminated to generate the signal. A pre-coding circui...
|
|
JPH09130433A |
To provide a data control circuit by which plural ways of data communication or multi-mode control are attained with less number of terminals by using plural comparators so as to detect a level of an input voltage and using the data obta...
|
|
JP2609888B2 |
|
|
JP2610764B2 |
PURPOSE: To improve recording efficiency by recording information on respective independently changeable separated continuous marks and showing separated one of binary code blocks of plural bits with continuous lengths of respective mark...
|
|
JP2610765B2 |
PURPOSE: To restore a high efficiency recorded signal by demodulating, decoding and deformatting a signal making respective mark lengths respectively separated and continued plural bits of binary code blocks and recording information. CO...
|
|
JP2610763B2 |
PURPOSE: To improve recording efficiency by recording information on respective independently changeable separated continuous marks and showing separated one of binary code blocks of plural bits with continuous lengths of respective mark...
|
|
JP2606194B2 |
|
|
JP2599998B2 |
|
|
JPH09503893A |
A method and apparatus for demodulating a pulse width modulated (PWM) signal previously modulated with either a first or second data value comprises sensing an actual duration of the first period of the bit cell, and generating an actual...
|
|
JPH09102190A |
To suppress error production for high reliable data and to enable long time recording for data of a low possibility of malfunction by controlling information content written in a unit cell with reference to a sort of data in the case of ...
|
|
JP2598202B2 |
PURPOSE: To surely detect the abnormality of set data of a floppy disk drive controller (FDDC) supplied from a memory such as a PROM and to prevent malfunction. CONSTITUTION: The set data in a binary form are converted to a di-pulse(DP) ...
|
|
JP2596643B2 |
PURPOSE: To improve the encoding gain of encoding modulation against the fading of mobile communication, etc. CONSTITUTION: Interleaved block encoding modulation having a built-in time diversity is applied to a fading channel 30. Such va...
|
|
JPH0983371A |
To output FM demodulated binarized data in optimum state at all times by changing the slice level of a data slice means to an FM demodulate signal corresponding to the pulse width of measured FM demodulated binarized data. Based on the o...
|
|
JPH0983372A |
To provide a synchronizing detector for biphase modulated data with which the detection probability of synchronizing pattern can be improved. A pattern matching recognizer 18 recognizes matching between a pattern composed of 8-bit data s...
|
|
JP2591890B2 |
PURPOSE: To record information on a recording medium with high efficiency by recording digital information in the continuation of an independently variable isolated mark and making the interval of the mark an independently variable lengt...
|
|
JP2592054B2 |
Disclosed is a data demodulation system for reproducing data dividedly recorded in a plurality of recording blocks of a recording medium, comprising the steps of adding specified data patterns to the data bits of dividing portions of eac...
|
|
JP2593071B2 |
|
|
JPH0974428A |
To obtain a circuit satisfying over and under-shoot specifications by means of a transformer of a simple structure by providing a coder, a signal control circuit, a pre-equalization circuit, a driver and an output circuit. A coder 1 rece...
|
|
JPH0974379A |
To provide an optical communication equipment capable of smoothing the optical spatial transmission of Manchester codes and link test pulses, etc. In an optical communication LAN equipment 15 for transmitting signals by the optical spati...
|
|
JP2589709B2 |
In a data transmission system using a predetermined trellis code, the output signal points are selected from a predetermined alphabet representing (k+n)-bit input words by using the values of n bits of each input word, and bits from prev...
|
|
JP2590410B2 |
|
|
JPH0964922A |
To realize a bipolar code reception method in which training for level adjustment and huge amount signal processing in each of an AGC circuit, filters and a digital PLL or the like having been required for a conventional circuit. A recep...
|
|
JP2585502B2 |
A run-length-limited group coding system is provided wherein the code permits a high data transfer efficiency. Code values for both data and control functions are chosen such that the maximum cumulative DC deviation from a nominal center...
|
|
JPH0951358A |
To surely detect erroneous data on a receiving side by allowing a comparing means to output an error signal when the sum of the length of a high level period and that of a low level period measured by a pulse measuring means through the ...
|
|
JPH0945015A |
To realize maximum likelihood encoding in a small scale of hardware by folding a trellis diagram double in an up/down direction and setting the resulting diagram as a new trellis diagram. An equivalent output yk corresponds only to posit...
|
|
JPH0944185A |
To provide a pulse width modulation(PWM) signal modulating and demodulating circuit in which a prediction control is conducted for the amplification of an input amplifier based on stored digital values and the stored amplification value ...
|
|
JPH0936922A |
To shorten the width of one bit and to accelerate communication by recognizing data during the first 'L' or 'H' period of one bit, shortening and omitting the following 'H' or 'L' period. Corresponding to digital data, data '0' are compo...
|
|
JP2577628B2 |
|
|
JP2578405B2 |
|
|
JPH0927171A |
To encode the 16 bits data to the 17 bits data by directly mapping an inputted byte to a code word separated by a central bit of a unit value. The bit is positioned and labeled in a block 52 so that the bit position of A byte becomes sym...
|
|
JP2573245B2 |
|
