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Title:
DECODER
Document Type and Number:
Japanese Patent JPS58146089
Kind Code:
A
Abstract:

PURPOSE: To change the decoding function, by constituting intersecting points in a decoder having a decoding funtion of N-MOSs and storage elemnts, determining the pattern of divisions from the information planted in the storage elements, and installing a data line and a control line to be used for planting.

CONSTITUTION: An address is inputted from an address input line 21 as a pair of signals Ae and -Ae. On all intersecting points 25, etc., of the address input line 21 and line 23, etc., N-MOSs 24, etc., are formed and they are grounded through another N-MOS 26. The gate of the N-MOS 26 is a storage element and connected to a latch circuit composed of four MOSs 27W30. The latch circuit holds input signal values from a line 31, and outputs an inverting signal. Information is written in the storage element by using a data line 33 and write controlling lines 34W36. In this way, the decoding function is optionally changed when the information in the storage element in the decoder is rewritten.


Inventors:
NOGUCHI YOSHIKI
NAKAMURA HIDEO
Application Number:
JP2742982A
Publication Date:
August 31, 1983
Filing Date:
February 24, 1982
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G11C11/413; G11C8/10; H03K19/177; H03M5/04; H03M7/02; (IPC1-7): G06F5/02; G11C8/00; G11C11/34; H03K13/24; H03K19/177
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
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