To connect a single large-scale memory array to a plurality of networks by using a stream processor for generating a communication protocol.
In the network, one or more protocols are used for data communications, and a transport protocol stack is generated in accordance with each network. Since the stack is generated by hardware, a throughput is remarkably improved and the number of streams which can be generated is increased. Since the protocol stack is generated by the hardware, a broadband data bus and a broadband address bus can be used and as a result, the throughput from the large-scale memory array is performed at higher speed. A plurality of protocol generators access the same memory block, a great number of streams are generated by a single copy from contents located in the large-scale memory buffer array.
JPH0738181 | INDUSTRIAL APPLICABILITY: Bus control method |
JP5005350 | Memory controller |
JPS6057095 | [Title of the Invention] Memory storage |
SCHEFFLER ROBERT
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