Title:
MOS GATE DRIVER CIRCUIT
Document Type and Number:
Japanese Patent JPH08330929
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To obtain a MOS gate driver circuit with a simplified circuit structure and high speed operation. SOLUTION: In a circuit 11 at a high-voltage side to turn off an output at the high-voltage side of a MOS gate device by responding to a state of a fault, a fault latch and a filter circuit 32 used in the MOS gate driver for a power MOS gate device are arranged at the high-voltage side of the circuit. Furthermore, the fault latch and the filter circuit 32 are arranged in a floating well of a semiconductor chip, including the driver circuit. The fault latch and the filter circuit 32 are connected with an output driver circuit 17 through a gate 31, to receive the filter at the high-voltage side and a latch 16 and operated through a level shift raising circuit by an input control logic circuit. The fault latch circuit 32 is provided with the output whose level is shifted downwards in a fault-informing latch circuit 33 at a low-voltage side of the device by a single PMOS device Q1 .
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Inventors:
DANA UIRUHERUMU
TARUBOTSUTO EMU HOOKU
TARUBOTSUTO EMU HOOKU
Application Number:
JP3949296A
Publication Date:
December 13, 1996
Filing Date:
February 27, 1996
Export Citation:
Assignee:
INT RECTIFIER CORP
International Classes:
H01L27/092; H03K17/08; H03K17/082; H03K17/18; H03K17/687; H01L21/8238; (IPC1-7): H03K17/687; H01L21/8238; H01L27/092; H03K17/08
Attorney, Agent or Firm:
Aoyama Ryo (1 person outside)
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