Title:
PLASMA ETCHING METHOD
Document Type and Number:
Japanese Patent JP3385729
Kind Code:
B2
Abstract:
PURPOSE: To perform a uniform patterning without a micro loading effect by using a deposit by a dissociation product of an etching gas as a side wall protecting film and by applying a patterning adopting an etching condition with lower possibility of depositing the dissociation product.
CONSTITUTION: A W poly-silicide layer as an etching layer is formed by forming high melting point metal silicide layers 4 that comprises polycrystalline silicon layer 3 and WSix in order on an insulating layer 2 that comprises SiO2 on a semiconductor substrate l. An inorganic material mask layer 5, that comprises SiO2, on the W poly-silicide layer is formed and a resist mask layer 6 is formed on it. An inorganic mask 5a is formed by patterning the inorganic material mask layer 5 using the resist mask 6 as a mask. Heating an etching substrate near to the subliming temperature of the deposit, the etching layer is patterned. After finishing the etching, the side wall protecting layer film is sublimed and removed from the etching substrate by heating the etching substrate at the temperature of 90°C or higher.
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Inventors:
Kadomura Shingo
Application Number:
JP16096494A
Publication Date:
March 10, 2003
Filing Date:
July 13, 1994
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H01L21/302; H01L21/3065; (IPC1-7): H01L21/3065
Domestic Patent References:
| JP6132256A | ||||
| JP4343422A | ||||
| JP613350A | ||||
| JP661195A | ||||
| JP5206125A | ||||
| JP5259119A |
Attorney, Agent or Firm:
Kuninori Funabashi