SEMICONDUCTOR DEVICE, MANUFACTURE THEREOF, BASIC CELL LIBRARY AND FORMATION THEREOF, AND MASK

Japanese Patent JP3311244

B2

PROBLEM TO BE SOLVED: To provide a semiconductor device of a structure, wherein the width of a polysilicon gate, which is corrected on the basis of an OPC(optical proximity effect correction), is decreased, a CAD treating time is shortened, a correction, which is made by the OPC, is executed in each cell and a shortening of a product TAT can be realized, a basic cell library, a method of manufacturing the semiconductor device, a method of forming the basic cell library and a mask.
SOLUTION: A dummy wiring pattern 4 is previously kept formed 6n the outer periphery of a basic cell cataloged into a basic cell library. Thereby, the distance between a polysilicon gate 3, which is used as a circuit in the basic cell, and a polysilicon wiring, which is close to this gate 3, of the pattern 4 can be determined in the cell. As a result, as the magnitude of the variation of the width of the polysilicon gate due to the optical proximity effect of all the polysilicon gates in the basic cell is forecast, a correction value due to an OPC on a mask for correcting the width of the gate can be decided only in the interior of the cell on the basis of the variation of the width of the polysilicon gate.

JPS6191946	SEMICONDUCTOR DEVICE
JPH0721789	SEMICONDUCTOR DEVICE AND ITS REPLACEMENT METHOD FOR STORAGE ELEMENTS
JP2003249563	SEMICONDUCTOR INTEGRATED CIRCUIT

Akira Yamaguchi

JP20423696A

August 05, 2002

July 15, 1996

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Toshiba Corporation

H01L21/82; G03F1/36; G03F1/68; G03F1/70; G06F17/50; H01L27/02; H01L27/118; (IPC1-7): H01L21/82; G06F17/50

JP8279600A
JP8272075A

Hisashi Takemura

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