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WO/2023/204840A1 |
Methods and apparatus for processing a substrate are provided herein. For example, a matching network configured for use with a plasma processing chamber comprises an input configured to receive one or more radio frequency (RF) signals, ...
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WO/2023/204081A1 |
A power converter (60) is provided between a power supply line (Lp) and a ground line (Lg) which are connected to a battery (15) and converts the DC power of the battery (15) to supply the converted power to a load (80). A control circui...
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WO/2023/202683A1 |
Disclosed in the present invention are a low noise amplifier and a corresponding radio frequency front-end module, a method, and a mobile terminal. According to the low noise amplifier, high isolation among input ports is achieved by mea...
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WO/2023/205150A1 |
A synchronization module is configured to generate a synchronization signal for transmission to at least one of a power generator and/or at least one match network, wherein the synchronization signal is formed with pulses having varying ...
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WO/2022/250997A9 |
A generator produces output such as delivered power, voltage, current, forward power etc. that follows a prescribed pattern of output versus time where the pattern repeats with a repetition period by controlling sections of the pattern b...
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WO/2023/204992A1 |
One example includes an atomic optical reference system. The system includes an optical system comprising a laser configured to generate an optical beam. The system also includes a vapor cell comprising alkali metal atoms that are stimul...
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WO/2023/202776A1 |
An oscillator management circuitry is disclosed for controlling a plurality of oscillators. The oscillator management circuitry comprises a phase detector – e.g., a time-to-digital converter(TDC) – configured to determine a differenc...
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WO/2023/204328A1 |
A communication device generates N encoded bits by encoding an information block on the basis of a polar sequence Q N-1 0 = {Q0, , Q1,..., QN-1, wherein N>1024, and 0 <= QN i <= N-1 denotes a bit index for i = 0, 1,..., N-1, the polar se...
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WO/2023/204471A1 |
An electronic device according to an embodiment disclosed in the present document may comprise: a connector which includes at least one pin; a data conversion circuit which converts data, transmitted/received through a designated pin amo...
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WO/2023/205530A1 |
Described herein is an apparatus and a method for a low noise infinite radio frequency (RF) delayed-locked loop (DLL). The apparatus comprises a phase detector having a first input configured to receive a first RF signal, a second input,...
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WO/2023/204871A1 |
Aspects of the disclosure provide methods and apparatuses for video encoding/decoding. In some examples, an apparatus for video decoding includes receiving circuitry and processing circuitry. The processing circuitry determines, a use of...
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WO/2023/205390A1 |
Disclosed are example embodiments of harmonic mixer. The harmonic mixer including a multi-phase LO signal generator. Each phase of the multi-phase LO signal generator outputting an LO signal on a signal line. The harmonic mixer including...
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WO/2023/202308A1 |
The present utility model provides a radio frequency amplifier circuit and a radio frequency chip. The radio frequency amplifier circuit comprises an input matching circuit, a first capacitor, a bias circuit, a radio frequency amplificat...
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WO/2023/203738A1 |
Provided is a Doherty amplifier (1000) in which the number of amplifiers that contribute to an amplification operation changes in accordance with the power of an input signal, said Doherty amplifier comprising at least four amplifiers (1...
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WO/2023/204250A1 |
An elastic wave device 10 comprises: a support member 20 that has a cavity portion 23 in one main surface thereof; a piezoelectric layer 21 that is provided on the one main surface of the support member 20 so as to cover the cavity porti...
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WO/2023/201475A1 |
A surface acoustic wave filter, comprising: a piezoelectric layer (105), which is configured to convert mechanical energy and electrical energy into each other, wherein the piezoelectric layer (105) comprises a first vertical interface (...
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WO/2023/202149A1 |
Provided in the present application are a state selection method and system for finite state entropy encoding, and a storage medium and a device. The method comprises: acquiring a symbol sequence, obtaining normalization probabilities of...
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WO/2023/202829A1 |
A differential current buffer circuit comprises a differential input stage supplied from a first positive and a first negative supply voltage. The input stage has a first input circuit connected between first current paths of a first cur...
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WO/2023/204272A1 |
An elastic wave device of the present disclosure comprises: a serial arm connected between an input terminal and an output terminal; at least one parallel arm connected between the serial arm and a ground potential; and a plurality of el...
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WO/2023/203176A2 |
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WO/2023/199862A1 |
The present invention improves isolation between signals when asynchronous communication is performed by TDD. A high frequency module (1) is provided with a mounting substrate (4), a first acoustic wave filter, a second acoustic wave fil...
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WO/2023/201136A1 |
According to embodiments, an example UE may include means for obtaining a set of ADC samples generated by an ADC based on analog signals and an ADC input clock and means for generating, at a first time point, a start signal indicating a ...
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WO/2023/198817A1 |
Embodiments according to the invention relate to a decoder for providing decoded parameters of a neural network on the basis of an encoded representation, wherein the decoder is configured to obtain a first multi-dimensional arraycompris...
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WO/2023/199861A1 |
The present invention improves the heat dissipation of two transmission filters of a high-frequency module that transmits two transmission signals that make it possible to achieve simultaneous communication. A high-frequency module (1) c...
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WO/2023/199964A1 |
An antenna apparatus comprises: a first substrate including an antenna array in which a plurality of active antennas each including an antenna and a semiconductor structure configured to generate or detect an electromagnetic wave are pro...
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WO/2023/200670A1 |
A filter device is provided that includes a substrate having a surface and a piezoelectric plate (610) supported by the substrate. A plurality of interdigital transducers, IDTs, for multiple resonators are provided that each have interle...
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WO/2023/200680A1 |
A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an...
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WO/2023/199883A1 |
This power amplification module comprises: a carrier amplification circuit; a carrier bias circuit that supplies a bias to the carrier amplification circuit; a peak amplification circuit; and a peak bias circuit which includes a first tr...
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WO/2023/198313A1 |
For a bidirectional power semiconductor switch (1) with a first semiconductor circuit arrangement (11) comprising a first Si or SiC MOSFET (8) and a second Si or SiC MOSFET (12) and a parallel connected first IGBT (9) and a second IBGT (...
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WO/2023/197044A1 |
A fluid level indicating apparatus, comprises: a first body provided with a plurality of first-body electrically conductive regions; a second body provided with a second- body electrically conductive region; the first and second bodies b...
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WO/2023/199863A1 |
The present invention suppresses degradation of the filter characteristics of each of a first transmission filter and a second transmission filter due to temperature increases in the first transmission filter and the second transmission ...
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WO/2023/199663A1 |
This high frequency circuit (1) comprises: an antenna connection terminal (100); an acoustic wave filter (21); a power amplifier (11) connected to the acoustic wave filter (21); a temperature sensor (61) that measures the temperature of ...
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WO/2023/199966A1 |
Provided is an antenna device that generates or detects electromagnetic waves and includes: a first active antenna including a first oscillator and a first antenna; a second active antenna including a second oscillator and a second anten...
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WO/2023/199840A1 |
he present invention suppresses oscillation in a sense current detection signal outputted from a power semiconductor element for current monitoring. A voltage control circuit (1c) includes a diode (D1) for charging a gate voltage to be...
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WO/2023/200898A1 |
According to an aspect of an embodiment, a decision feedback equalizer (DFE) may be configured for noise suppression slicing. The DFE may be configured to receive, from a feedforward equalizer, an output signal having a received (Rx) sym...
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WO/2023/200620A1 |
A switched mode amplifier system may include a switched mode amplifier having an amplifier input coupled to an output of an analog integrator and an amplifier output, include a feedback network coupled between the amplifier output and an...
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WO/2023/197382A1 |
The present invention provides a Lamb wave resonator. The Lamb wave resonator comprises a piezoelectric substrate, a first interdigital transducer, and a second interdigital transducer; both the first interdigital transducer and the seco...
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WO/2023/199965A1 |
This antenna device comprises, on a semiconductor substrate: a first active antenna which includes a first antenna for transmitting or receiving a first electromagnetic wave of a first frequency, and a first negative resistance element; ...
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WO/2023/198342A1 |
Control signals for power switches in a resonant DC/DC converter, for example an LLC converter, are generated by counting a number of clock cycles, for example 1000, of a clock with a high frequency, for example 100 MHz. In this way, a s...
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WO/2023/200661A1 |
The present disclosure generally relates to biasing an isolation region in a semiconductor substrate. In an example, an integrated circuit includes a semiconductor substrate (112), a first rectifying device (212), and a second rectifying...
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WO/2023/199394A1 |
A digital sender (DS) includes: a clock generation circuit (1A) that generates a clock (CL); a delta sigma modulation circuit (1C) that generates a first delta sigma modulation signal (DL) by performing delta sigma modulation on a digita...
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WO/2023/197116A1 |
The present application provides a radio frequency power amplification circuit and a communication device. The radio frequency power amplification circuit comprises a power amplification unit, an input matching circuit, and an output mat...
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WO/2023/201135A1 |
According to embodiments, an example method for determining an analog-to-digital converter (ADC) output timing in a user equipment may include operating a switch in a first mode to route a system clock from an oscillator to an input of t...
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WO/2023/197673A1 |
The present application relates to the technical field of communications, and discloses a Doherty power amplifier, a circuit board assembly, and an electronic device. Two output ends of a power distribution unit (101) are respectively co...
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WO/2023/199784A1 |
In this filter, a filter element is included in a signal path extending from an input side to an output side. A first resonator connects: a site, on the signal path, which electrically serves as an input side with respect to the filter e...
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WO/2023/199860A1 |
The present invention suppresses degradation of the characteristics of a filter. In a filter (1) of a high-frequency module (500), a first chip (10) is disposed on a mounting substrate (9), and a second chip (20) is disposed on the first...
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WO/2023/197080A1 |
A system for reference clock frequency correction is described. The system comprises a compensation module configured to (i) receive, as input, an oscillator signal and one or more control signals, (ii) generate a compensation signal bas...
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WO/2023/092101A9 |
Power amplifiers having improved gate oxide integrity are disclosed. In particular, a dynamic asymmetric cascode bias circuit is used to provide a bias signal to a cascode power amplifier stage. The bias signal swings in synchronicity wi...
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WO/2023/197506A1 |
A data storage method, which is applied to the technical field of coding. The method comprises: receiving data to be coded; determining a coding matrix for RS coding, and a used Galois field GF(2m); replacing each element in the coding m...
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WO/2023/198150A1 |
The present application relates to the technical field of computers, and relates to a data compression method for electroencephalogram data, a chip, a device, and a storage medium. The method comprises: obtaining target electroencephalog...
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