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JPH06197024A |
PURPOSE: To adapt a DSV control characteristic to a specification being a requirement of a transmission system by controlling a DSV of a modulation code based on an inserted pattern so as to minimize the increase in the redundancy as req...
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JPH06187737A |
PURPOSE: To extract regenerative clocks from regenerative signals even though a partial response wave from equalization or the like is selected by making the regenerative signals to cross a slice level at least once within a prescribed p...
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JPH06188739A |
PURPOSE: To obtain the low-cost bit discriminator which performs bit discrimination between an NRZ code and an M2 code by using one part in common as a threshold value processing part for an NRZ code signal and a threshold value processi...
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JPH06188740A |
PURPOSE: To eliminate an error in decoding due to variation in the duty ratio of a clock signal. CONSTITUTION: A holding circuit M1 holds transmitted CMI code data by two bits by using a transmitted clock signal which is sent twice as fa...
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JPH0652620B2 |
Uncompressed data is represented in a constrained code for transmission through a channel which may include record media. A d,k code having a code rate of m/n is employed. "d" represents the minimum number of successive zeros in the chan...
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JPH0650472B2 |
A method and apparatus for performing data error detection and correction is disclosed for multi-level logic and in particular, three-level trinary logic of levels 0, 1, 2. A source of trinary data supplies individual pieces of data (tri...
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JPH0650593B2 |
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JPH0650592B2 |
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JPH0650590B2 |
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JPH06177771A |
PURPOSE: To satisfactorily reproduce a clock from a signal equalized to a partial response class 4 (PR4) CONSTITUTION: A reproducing signal which is equalized by a waveform equalizing circuit 5 so as to prevent a code-to-code interferenc...
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JPH0648585B2 |
A magnetic data card (10) has information recorded on a strip with three tracks. The card is read by passing across an electro-magnetic head (30) at a constant speed (V). The induced pulses are passed through a filter (32) and are amplif...
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JPH0648783B2 |
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JPH0648584B2 |
A data recovery apparatus comprises means (12) for measuring the phase difference between an input data signal and a reference data clock signal, means (13, 14) responsive to the phase difference to vary the frequency of the reference da...
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JPH06164405A |
PURPOSE: To prevent a transmission error by applying a specific voltage in the off-duty period of a mark pulse. CONSTITUTION: The presence or the absence of the mark pulse in the first half part of one bit indicates a mark or a space. Th...
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JPH0644769B2 |
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JPH06152428A |
PURPOSE: To provide an AMi code transmission circuit which does not change other parameters even when one parameter is optimized by adjusting one element. CONSTITUTION: A transmission circuit 10 at a station equipment, reception circuit ...
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JPH06152427A |
PURPOSE: To simplify a circuit for controlling switches and to reduce a chip size by decreasing the number of switches constituting the driver circuit for S interface. CONSTITUTION: This circuit is provided with a driver amplifier 11 dep...
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JPH06132830A |
PURPOSE: To test the receiving function of an AMI signal by varying the pulse width of delay time of each separated NRZ signal independently, synthesizing each varied NRZ to the AMI signal and varying the pulse amplitude of that AMI sign...
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JPH0636508B2 |
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JPH0636510B2 |
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JPH06120838A |
PURPOSE: To provide a unipolar/bipolar conversion circuit which requires no output transformer despite a fully electronic and balanced transmission line and also has no fluctuation of amplitude to the fluctuation of the power voltage. CO...
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JPH06111484A |
PURPOSE: To record with high density at a high data rate and without correlation by NRZI-modulating a code in which quantization is encoded according to a prescribed conversion table and recording it on a recording medium. CONSTITUTION: ...
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JPH06112835A |
PURPOSE: To relieve the load of arithmetic operation or the like of a microprocessor, to attain high speed processing and to reduce cost. CONSTITUTION: A circuit consists of a pulse width data output circuit 2, a pulse width conversion c...
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JPH0630490B2 |
A digital PLL technique to provide an effective sampling interval and resolution shorter than the driver clock period. A multi-phase driver clock provides a clock signals phase-offset from each other. One clock output signal is used as t...
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JPH06104765A |
PURPOSE: To obtain a recording and reproducing encoder by making a code word generator position the initial positions of M subgroups at different time intervals εm from the leading edge of a code work and imposing a condition, M>=2 and ...
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JPH0624347B2 |
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JPH0676485A |
PURPOSE: To provide a recording carrier which is provided with an encoding device and a decoding device and which is optimum for a recording/reproducing system by recording the address of a recording carrier and synchronous information i...
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JPH0669965A |
PURPOSE: To realize the transmission whose band width is saved more than that for binary signal transmission. CONSTITUTION: The system is provided with a transmitter 3, a receiver 4, a balanced line comprising two electric wires X, Y int...
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JPH0669806A |
PURPOSE: To simplify the configuration of a circuit to separate a first pre- synchronizing pulse from a Manchester biphase signal for converting the signal to a sequence of pulse trains with a narrow duration. CONSTITUTION: Among Manches...
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JPH0618362B2 |
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JPH0661866A |
PURPOSE: To obtain a unipolar bipolar conversion circuit with an excellent supplied power by devising the circuit such that tristates being levels of unipolar signals inputted alternately and a 0 level are selected in the same circuit st...
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JPH0614617B2 |
In a run length limited block coding method in which blocks of m data bits are converted to blocks of n1 information and n2 separation bits (n = n1 + n2>m). The blocks of bits satisfying the requirement of being (d, k) run length limited...
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JPH0614637B2 |
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JPH0612880B2 |
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JPH0629858A |
PURPOSE: To prevent the influence of noise and to enable the detection of abnormal data by the fixing of a high level, by transmitting a transmission abnormality detection signal when the voltage level of a transmission signal is lower t...
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JPH0621979A |
PURPOSE: To improve the reliability by reducing erroneous reports without increasing the missing of report. CONSTITUTION: In receiving the radio signal data of the Manchester code system by taking a bit synchronizing signal and data as o...
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JPH067402B2 |
A waveform equalizing circuit including a delay line, an attenuator, and a differential amplifier applied with the outputs of the delay line and attenuator is disclosed in which the delay time of the delay line and the attenuation factor...
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JPH0613910A |
PURPOSE: To provide a noise shaper whose output signal is always made zero when an input signal is zero. CONSTITUTION: The noise shaper 100 composed of integration circuits 12, 15 of one or more stages, a ternary quantizer 17 outputting ...
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JPH0613909A |
PURPOSE: To prevent spike noise which give adverse influence onto an entire conversion circuit. CONSTITUTION: In the unipolar/bipolar pulse conversion circuit consisting of two drivers 1, 2 formed by connecting two switching elements com...
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JPH063943B2 |
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JPH061608B2 |
A system for modulating and demodulating write data and read data in a magnetic recording system in accordance with a (1,7) RLL method. The modulating and demodulating system includes a first clock pulse generating circuit (1') receiving...
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JPH05342766A |
PURPOSE: To realize the decoder of data sequence for forming an address mark by detecting the last flux transition of the address mark and deciding the advance or retreat of byte clock starting for the portion of its shift quantity. CONS...
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JPH0588583B2 |
The present invention provides translation circuitry, which in one mode of operation acts to encode variable length data words into fixed rate data coded words for use with a communication channel, or a recording means, such as a magneti...
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JPH05335965A |
PURPOSE: To attain high speed conversion by connecting outputs of plural logic elements whose power supply voltage differs from each other in common and selecting an output state of the logic elements in response to an inputted digital s...
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JPH05509212A |
A method and an electronic communication link for piece of information serial transmission includes at multiple conductor constellation having at least three conductors (R, S, T). There could be provided at least three different combinat...
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JPH05325425A |
PURPOSE:To provide the code detecting device by which the same detection characteristic as a PR (1, 0, -1) system is obtained by using an NRZI system without using a pre-code circuit. CONSTITUTION:In a magnetic recording/reproducing part...
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JPH05327514A |
PURPOSE: To correctly modulate a data signal into a transmission output signal, and output it by synchronizing the data signal based on a clock signal. CONSTITUTION: A frequency dividing part 24 outputs the first and second frequency-div...
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JPH05327513A |
PURPOSE: To convert an input signal constituted of a Manchester code into a data signal of an NRZ code without being affected by an erroneous output generated by a hazard. CONSTITUTION: A phase delay circuit 11 delays the phase of the in...
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JPH0584099B2 |
A method termed Even Mark Modulation (EMM) is disclosed for coding input strings for input-restricted (1 + D) or (1 + D)<2> partial response channels that require at least one pair of consecutive signals of one state in order to record o...
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JPH05315966A |
PURPOSE: To improve error monitoring performance by suppressing the timing of a code pulse. CONSTITUTION: An NRZ data bit column is retiming-processed by a retiming part 1 by a clock synchronizing with the NRZ data bit column, and the sp...
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