Title:
【発明の名称】スパッター被覆処理を実施する方法及びスパッター被覆装置
Document Type and Number:
Japanese Patent JP3315114
Kind Code:
B2
Abstract:
A bias sputter coating apparatus is provided with a cathode target assembly having a central electrode which is maintainable at an adjustable voltage level which is negative with respect to the chamber anode but positive with respect to the cathode voltage and the bias voltage on the substrate. The apparatus is used to manufacture sputter coated articles such as semiconductor wafers. The method provides that the voltage on the central electrode is adjusted to a level which improves the ion flux distribution uniformity on the substrate. The electrode voltage is generally optimized in the range of from -8 volts to -20 volts.
More Like This:
Inventors:
Harwit, Stephen Dee.
Wagner, Islele
Heronyimi, robert
Wagner, Islele
Heronyimi, robert
Application Number:
JP51695091A
Publication Date:
August 19, 2002
Filing Date:
August 23, 1991
Export Citation:
Assignee:
東京エレクトロン株式会社
International Classes:
C23C14/34; C23C14/35; C23C14/54; H01J37/34; (IPC1-7): C23C14/35; C23C14/54; H01J37/34
Domestic Patent References:
| JP5887272A |
Attorney, Agent or Firm:
Akira Asamura (3 outside)