Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5778900
Kind Code:
B2
Abstract:
A method of manufacturing a semiconductor device includes: forming first to third gate electrodes in first to third regions, respectively; forming a first mask pattern covering the second region while exposing the first and third regions; forming p-type source drain extensions and p-type pocket regions by ion implantation using the first mask pattern as a mask; forming n-type source drain extensions by ion implantation using the first mask pattern as a mask; forming a second mask pattern covering the first and third regions while exposing the second region; and forming p-type pocket regions by implanting ions of indium into the silicon substrate with the second mask pattern being used as a mask.
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Inventors:
Ariyoshi Junichi
Taishi Ota
Taishi Ota
Application Number:
JP2010184518A
Publication Date:
September 16, 2015
Filing Date:
August 20, 2010
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
H01L21/8238; H01L27/092
Domestic Patent References:
| JP2010074176A | ||||
| JP2003017578A | ||||
| JP5267338A | ||||
| JP2000164727A |
Attorney, Agent or Firm:
Keizo Okamoto