PURPOSE: To provide the device for easily estimating the hit rate of a cache memory used in a computer.

CONSTITUTION: The computer is expressed by a queue model, and various data provided by analyzing data measured by a timer 8 to measure the processing time of a program by executing the program while changing the operation modes of cache memories 2a and 2b and by an instruction class executed number accumulating means 19 for accumulating the number of execution at every instruction classes executed at a processor 3 are substituted in a formula formularizing the processing time of the program from this model at every operation mode of cache memories 2a and 2b, and the hit rate of the cache memories 2a and 2b is calculated. A control program integrated into the computer entirely performs the setting of the operation mode, the measurement of data, the analysis of data and the calculation of the hit rate.