To provide a PLL frequency synthesizer in which the C/N of a voltage controlled oscillator is improved in the case that a phase comparator is in operation at a dead band.

The PLL frequency synthesizer provided with a loop filter 5 receiving a phase comparison output outputted from a phase comparator 4 and with a voltage controlled oscillator 2 whose oscillated frequency is controlled based on an output voltage of the loop filter 5 is provided with an attenuation circuit 10 that receives an output voltage from the loop filter 5 and whose output controls the oscillated frequency of the voltage controlled oscillator 2 and with a control circuit 20 which controls the attenuation of the attenuation circuit 10 based on an output voltage of the loop filter 5, and the output voltage of the attenuation circuit 10 based on the attenuation controlled by the control circuit 20 is used for a frequency control voltage to be applied to the voltage controlled oscillator 2.