Title:
半導体装置
Document Type and Number:
Japanese Patent JP5448304
Kind Code:
B2
Abstract:
A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.
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Inventors:
Takemura
Hiroshige Hirano
Yutaka Ito
Hikaru Sano
Koji Koike
Hiroshige Hirano
Yutaka Ito
Hikaru Sano
Koji Koike
Application Number:
JP2007110777A
Publication Date:
March 19, 2014
Filing Date:
April 19, 2007
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H01L21/3205; H01L21/301; H01L21/768; H01L23/522; H01L23/532
Domestic Patent References:
| JP2001267325A | ||||
| JP2004079596A | ||||
| JP2005167198A | ||||
| JP2005260059A | ||||
| JP2005109145A | ||||
| JP2005217411A | ||||
| JP2001308099A |
Foreign References:
| US6022791 |
Attorney, Agent or Firm:
Maeda patent office
Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura
Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura