SEMICONDUCTOR MEMORY - MITSUBISHI ELECTRIC CORP

Title:

SEMICONDUCTOR MEMORY

Document Type and Number:

Japanese Patent JPS595490

Kind Code:

A

Abstract:

PURPOSE: To stabilize and memory information and to read it in a high speed, by dividing and disposing plural sense amplifier circuit driving transistors in each sense amplifier circuit.

CONSTITUTION: Sense amplifier circuit driving transistors T21WT2iWT2n are divided and disposed in each sense amplifier circuit 3. By this configuration, charge of latch node through the sense amplifier circuit driving transistor T11 by a sense amplifier circuit driving signal S1 is delayed in the second group of sense amplifier circuit 3 which is far from a word line driver circuit 7, and delay of word line signal is compensated, and stable detecting operation is made possible. Since discharge of latch node 9 by sense amplifier circuit driving transistors T21WT2n disposed separately in each sense amplifier circuit 7 is performed at high speed, high speed operation of the sense amplifier circuit 7 is made possible.

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Inventors:

FUJIWARA KAZUYASU
OZAKI HIDEYUKI
SHIMOTORI KAZUHIRO

Application Number:

JP11597782A

Publication Date:

January 12, 1984

Filing Date:

July 01, 1982

Export Citation:

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Assignee:

MITSUBISHI ELECTRIC CORP

International Classes:

G11C11/409; G11C11/34; G11C11/401; (IPC1-7): G11C11/34

Domestic Patent References:

JPS5525857A	1980-02-23
JPS5534309A	1980-03-10

Attorney, Agent or Firm:

Masuo Oiwa

Next Patent: JOSEPHSON AFFIRMATIVE LATCH CIRCUIT