CHIP BONDING APPARATUS, CHIP PROCESSING SYSTEM, AND CHIP PROCESSING METHOD

Title:

CHIP BONDING APPARATUS, CHIP PROCESSING SYSTEM, AND CHIP PROCESSING METHOD

Document Type and Number:

WIPO Patent Application WO/2023/171249

Kind Code:

A1

Abstract:

This chip bonding apparatus bonds a chip to a device substrate that has a plurality of first devices on a major surface thereof, the chip having a second device that is electrically connected to the first device. The chip bonding apparatus is provided with a first carrier holding unit, a substrate holding unit, a pickup unit, and a mount unit. The first carrier holding unit holds a chip carrier that has, on a surface thereof, a plurality of attracting units for electrostatically attracting the chip. The substrate holding unit holds the device substrate. The pickup unit separates the chip from the chip carrier being held by the first carrier holding unit. The mount unit mounts the chip that has been separated from the chip carrier by the pickup unit, onto the device substrate being held by the substrate holding unit.

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Inventors:

MIZOMOTO YASUTAKA (JP)
HAYAKAWA SUSUMU (JP)

Application Number:

PCT/JP2023/004765

Publication Date:

September 14, 2023

Filing Date:

February 13, 2023

Export Citation:

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Assignee:

TOKYO ELECTRON LTD (JP)

International Classes:

H01L21/50; H01L21/60; H01L21/677

Foreign References:

JP2008103390A	2008-05-01
JP2013168566A	2013-08-29
JP2019106435A	2019-06-27
JP2012119399A	2012-06-21

Attorney, Agent or Firm:

ITOH, Tadashige et al. (JP)

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