Title:
A METHOD FOR FORMING A THIN COMPLETE HIGH-PERMITTIVITY DIELECTRIC LAYER
Document Type and Number:
WIPO Patent Application WO2006039029
Kind Code:
A3
Abstract:
A method for forming a thin complete high-k layer (106, 207) for semiconductor applications. The method includes providing a substrate (25, 102, 202, 406) in a process chamber (10, 402), depositing a thick complete high-k layer (206) on the substrate (25, 102, 202, 406), and thinning the deposited high-k layer (206) to form a thin complete high-k layer (106, 207) on the substrate (25, 102, 202, 406). Alternately, the substrate (25, 102, 202, 406) can contain an interface layer (104, 204) between the substrate (25, 102, 202, 406) and the high-k layer (106, 207). The thinning can be performed by exposing the thick high-k layer (206) to a reactive plasma etch process or, alternately, a plasma process capable of modifying a portion of the thick high-k layer (206) and subsequently removing the modified portion (206a) of the thick high-k layer (206) using wet processing.
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Inventors:
WAJDA CORY (US)
Application Number:
PCT/US2005/030841
Publication Date:
July 27, 2006
Filing Date:
August 31, 2005
Export Citation:
Assignee:
TOKYO ELECTRON LTD (JP)
TOKYO ELECTRON AMERICA INC (US)
WAJDA CORY (US)
TOKYO ELECTRON AMERICA INC (US)
WAJDA CORY (US)
International Classes:
H01L21/311; H01L21/316
Foreign References:
| US20030109106A1 | 2003-06-12 | |||
| US20040129674A1 | 2004-07-08 | |||
| US20040105213A1 | 2004-06-03 | |||
| US6232174B1 | 2001-05-15 |
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