Title:
METHODS AND APPARATUS FOR EFFICIENT DENORMAL HANDLING IN FLOATING-POINT UNITS
Document Type and Number:
WIPO Patent Application WO/2020/264540
Kind Code:
A3
Abstract:
A floating-point (FP) arithmetic unit includes a first FP execution pipeline operatively coupled to a register file, the first FP execution pipeline configured to perform a first FP operation on a first FP operand provided by the register file, the first FP execution pipeline comprising a plurality of execution units; and a first normalization unit operatively coupled to the register file, and the first FP execution pipeline, the first normalization unit configured to normalize the first FP operand, wherein the first normalization unit is configured to operate in parallel with the first FP execution pipeline, and is further configured to, in response to detecting that the first FP operand is a denormal, assert a first FP execution pipeline busy flag to stall the instruction dispatch of a first subsequent FP operation, the first FP operation and the first subsequent FP operation being of one FP operation type.
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Inventors:
DIBRINO MICHAEL (US)
Application Number:
PCT/US2020/053055
Publication Date:
March 25, 2021
Filing Date:
September 28, 2020
Export Citation:
Assignee:
FUTUREWEI TECHNOLOGIES INC (US)
International Classes:
G06F9/30; G06F9/38
Foreign References:
| US20140164464A1 | 2014-06-12 | |||
| US20130138925A1 | 2013-05-30 | |||
| US20120215823A1 | 2012-08-23 |
Other References:
SCHMOOKLER M ET AL: "FPU Implementations with Denormalized Numbers", IEEE TRANSACTIONS ON COMPUTERS, IEEE, USA, vol. 54, no. 7, 11 July 2005 (2005-07-11), pages 825 - 836, XP011132777, ISSN: 0018-9340, DOI: 10.1109/TC.2005.118
Attorney, Agent or Firm:
WIEBUSCH, Landon, E. (US)
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