Title:
SEMICONDUCTOR DEVICE, MEMORY DEVICE, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2023/187544
Kind Code:
A1
Abstract:
A semiconductor device with high recording density is adopted. The device has first and second transistors, first and second conductors, and first through third insulators. In the first transistor, a semiconductor layer is located above the first insulator, a source and a drain are located on the semiconductor layer and the first insulator, and a gate is located above the semiconductor layer. The second insulator is located above the first insulator and has an opening in a region that does not overlap the source or drain of the first transistor, the opening having the first insulator as the bottom surface and including the first conductor inside thereof. The third insulator is located on the second insulator and the first conductor, and has an opening having the gate of the first transistor as the bottom surface and including the second conductor inside thereof. In the second transistor, the semiconductor layer is located on the third insulator in a region overlapping the first conductor, and a source and a drain are located on the semiconductor layer and on the third insulator. In particular, one of the source and drain is also located on the second conductor.
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Inventors:
KIMURA HAJIME (JP)
YAMAZAKI SHUNPEI (JP)
YAMAZAKI SHUNPEI (JP)
Application Number:
PCT/IB2023/052692
Publication Date:
October 05, 2023
Filing Date:
March 20, 2023
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB (JP)
International Classes:
H10B12/00; H01L21/8234; H01L27/06; H01L27/088; H01L29/786; H10B41/70
Domestic Patent References:
| WO2021033075A1 | 2021-02-25 |
Foreign References:
| JP2015222807A | 2015-12-10 | |||
| JP2020123612A | 2020-08-13 | |||
| JP2011192979A | 2011-09-29 |
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