Title:
SILICON CARBIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/006594
Kind Code:
A1
Abstract:
This silicon carbide semiconductor substrate is provided with: a silicon carbide substrate having a main surface; a first silicon carbide semiconductor layer disposed on the main surface; a second silicon carbide semiconductor layer disposed on the first silicon carbide semiconductor layer; and a third silicon carbide semiconductor layer directly disposed on the second silicon carbide semiconductor layer. The first silicon carbide semiconductor layer contains an n-type impurity at a first concentration. The second silicon carbide semiconductor layer contains an n-type impurity at a second concentration. The third silicon carbide semiconductor layer contains an n-type impurity at a third concentration. The first concentration is higher than the second concentration. The third concentration is higher than the second concentration.
More Like This:
| JPS59231866 | SEMICONDUCTOR DEVICE |
| JP2006514424 | Schottky Barrier CMOS Devices and Methods |
| JPS52128081 | PROTECTION CIRCUIT FOR C-MOS IC |
Inventors:
NISHIGUCHI TARO (JP)
HIYOSHI TORU (JP)
HIYOSHI TORU (JP)
Application Number:
PCT/JP2016/059707
Publication Date:
January 12, 2017
Filing Date:
March 25, 2016
Export Citation:
Assignee:
SUMITOMO ELECTRIC INDUSTRIES (JP)
International Classes:
H01L29/78; H01L21/20; H01L21/265; H01L21/336; H01L29/12
Foreign References:
| JP2013149798A | 2013-08-01 | |||
| JP2013247252A | 2013-12-09 | |||
| JP2011171374A | 2011-09-01 |
Attorney, Agent or Firm:
NAKATA, Motomi et al. (JP)
Download PDF: