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Matches 1 - 50 out of 817,822

Document Document Title
WO/2024/082359A1
The present disclosure provides a semiconductor dicing method. The semiconductor dicing method comprises: providing a semiconductor stacking member and a first carrier which are stacked; removing the first carrier and retaining the semic...  
WO/2024/084957A1
Provided are: a polishing method which can maintain a sufficiently high insulating-film polishing rate and selectivity and can be sufficiently inhibited from causing polishing flaws; and a method for producing a semiconductor component u...  
WO/2024/082529A1
Disclosed are a semiconductor structure and a manufacturing method for the semiconductor structure. The semiconductor structure comprises: a first structural member and a second structural member, which are stacked and welded to each oth...  
WO/2024/085938A1
Systems and methods provide a solution for efficiently generating high density plasma for a physical vapor deposition (PVD). The present solution includes a vacuum chamber for a PVD process. The system can include a target located within...  
WO/2024/085214A1
The present invention comprises: a template substrate that includes a growth suppression region and a first seed region aligned in a first direction; and a first semiconductor part that is positioned above the template substrate and that...  
WO/2024/083493A1
A slit valve assembly for use in a vacuum chamber, for example in a vacuum chamber of a substrate processing system is proposed, wherein the slit valve assembly comprises a housing having sidewalls and at least one substrate transfer por...  
WO/2024/084621A1
In the present invention, an epitaxial layer (2) is formed on a substrate (1). A field effect transistor (3) is formed on the epitaxial layer (2). A drain pad (8) is formed on the epitaxial layer (2). The drain pad (8) is connected to a ...  
WO/2024/085489A1
A substrate processing apparatus according to an embodiment of the present invention comprises: a chamber provided with a side wall; a susceptor which is provided with an inclined side surface and on which a substrate is mounted in the c...  
WO/2024/085098A1
[Problem] When forming GSR elements directly onto an integrated circuit substrate (ASIC), it has been difficult to form micro-coils because of a) the method of forming inverted trapezoidal grooves, b) unevenness in the ASIC substrate sur...  
WO/2024/085024A1
The present invention is a lifting method for moving a fine structure that is formed on a supply substrate to a receiving substrate through laser lift-off, wherein a surface of the fine structure that faces the receiving substrate has a ...  
WO/2024/086295A1
A method to produce a layered substrate, which includes the steps of depositing a diffusion barrier layer on the substrate; depositing an underlayer comprising a Group 6 metal on the barrier layer; and depositing a ruthenium layer on the...  
WO/2024/086064A1
Semiconductor devices and methods of manufacturing the same are described. The method includes forming a source region and a drain region adjacent a superlattice structure on a substrate. The source region and the drain region comprise a...  
WO/2024/019774A3
Exemplary methods of fabricating high quality quantum computing components are described. The methods include removing native oxide from a deposition surface of a silicon substrate in a cleaning chamber of a processing system, and transf...  
WO/2024/084757A1
A fluid supply system according to one aspect of the present disclosure supplies a fluid into a processing container in which a substrate is to be processed, said fluid supply system comprising: a processing fluid supply unit that suppli...  
WO/2024/086529A1
A method for fabricating a ferroelectric device includes providing a lower electrode layer on a substrate, forming a retention enhancement layer by oxidizing a surface of the lower electrode layer using a gas phase oxidation process, and...  
WO/2024/084366A1
Provided is a semiconductor device that enables miniaturization or higher integration. Provided is an oxide semiconductor suitable for the semiconductor device. Formed is an oxide semiconductor that has a small difference in thickness be...  
WO/2024/084725A1
A film forming apparatus (1) includes a chamber (101), a stage (190) that supports a substrate, a source gas supply unit that supplies source gas into the chamber (101), a high-frequency application unit (102) that generates plasma in th...  
WO/2024/085025A1
The present invention provides a reception substrate for transferring and receiving, through laser lift-off, a microstructure formed on a supply substrate. The reception substrate has a curable resin layer on the surface to which the mic...  
WO/2024/084778A1
The present invention achieves a high withstand voltage by means of an outer peripheral region having a small width. A semiconductor device according to the present invention comprises: a semiconductor substrate that has an element regio...  
WO/2024/082224A1
A III-nitride-based semiconductor packaged structure includes a lead frame, a first adhesive layer, a III-nitride-based die, a second adhesive layer, and a first conductive trace. The lead frame includes a die paddle and a lead. The firs...  
WO/2024/085083A1
Provided is a glass substrate that suppresses cracking during laser processing. A glass substrate (10) has a mark (100) provided on the surface thereof, and has a parameter (y) as stipulated in formula (1) of less than 1.4.  
WO/2024/037324A9
The present disclosure relates to the technical field of display, and provides a display substrate, a display device, and a display substrate manufacturing method, capable of solving the problem of short circuits between adjacent metal w...  
WO/2024/085055A1
The purpose of the present invention is to, when a substrate (or substrates) is (are) disposed on a substrate holder for holding the substrate(s), detect the position(s) of the substrate(s) disposed in various forms, in which, for exampl...  
WO/2024/084987A1
This substrate processing apparatus comprises: a processing vessel that has a carry in/out opening for substrates, and that accommodates the substrates; a lid that opens/closes the carry in/out opening; a gate opening/closing part that m...  
WO/2024/085410A1
The present invention relates to a plasma chamber and a wafer etching method using the plasma chamber. The plasma chamber of the present invention comprises: a housing having a reaction space therein in order to etch a wafer through plas...  
WO/2024/085213A1
The present invention comprises: a template substrate including a first seed region and a growth suppression region aligned in a first direction; and a first semiconductor part positioned above the template substrate. The first semicondu...  
WO/2024/085243A1
A semiconductor substrate comprising: a template substrate including a first seed region and a growth suppression region; and a first semiconductor part having a first base portion positioned above the first seed region and a first wing ...  
WO/2024/082403A1
A 3D memory array and a preparation method therefor, and an electronic device. The 3D memory array comprises a plurality of vertically stacked memory arrays and a plurality of vertically extending write word lines (120), wherein each mem...  
WO/2024/085915A1
The present disclosure relates to heat source arrangements, processing chambers, and related methods to facilitate deposition process adjustability. In one implementation, a processing chamber applicable for use in semiconductor manufact...  
WO/2024/082655A1
Provided in the embodiments of the present application are a high electron mobility transistor device and a manufacturing method therefor. The device (100) has a structural unit (10) or at least two structural units (10), which are repea...  
WO/2024/083019A1
The present invention relates to a cleaning composition, which specifically comprises: an alkaline compound, an alcohol amine, a corrosion inhibitor, a chelating agent and a solvent. The positive effects thereof lie in that residues left...  
WO/2024/084715A1
The present invention inspects the workpieces in a tray without a reduction in throughput, even when a large inspection tool is used. A workpiece inspection device 10 comprises a first stage 11 that transfers a first table 21 onto whic...  
WO/2024/084664A1
A semiconductor substrate comprising: a template substrate including a first seed region and a growth suppression region; and a first semiconductor part having a first base portion positioned above the first seed region and a first wing ...  
WO/2024/084910A1
According to the present invention, a first main surface has a central measurement region, a first measurement region, a second measurement region, a third measurement region, and a fourth measurement region. When viewed along a straight...  
WO/2024/083435A1
Described is a method for predicting a parameter of interest of a manufacturing process for manufacturing integrated circuits. The method comprises: obtaining metrology data relating to the parameter of interest; applying a first predict...  
WO/2024/084853A1
The present description discloses techniques for highly accurately determining the position of a substrate. This position determination method comprises: a step for setting a region including an end portion of a substrate in a reference ...  
WO/2024/085017A1
The present invention provides a plasma processing apparatus which is provided with: a plasma processing chamber; an antenna which is provided on the upper part of or above the plasma processing chamber; an RF power supply which is elect...  
WO/2024/084864A1
A base material film (1) for a semiconductor manufacturing tape has at least a functional layer (2). The functional layer (2) contains at least a 1-butene homopolymer and a pentene copolymer. The ratio of stress (at 5% elongation) to str...  
WO/2024/084833A1
For example, a semiconductor device 1 includes a semiconductor substrate (N-SUB) of a first conductivity type, a well (P/W) of a second conductivity type different from the first conductivity type that is formed in the semiconductor subs...  
WO/2024/085016A1
Provided is a substrate treatment method including a step for developing a substrate wherein a negative-type metal-containing resist film is formed and subjected to an exposure treatment and a heat-treatment after the exposure treatment,...  
WO/2024/082898A1
A semiconductor fabrication device and method. The semiconductor fabrication device comprises a vacuum reaction chamber and a controller; a reaction gas spraying assembly, a reaction platform and a film thickness monitoring assembly are ...  
WO/2024/085975A1
A modular gas pallet assembly is disclosed herein, along with a cleaning unit and chemical mechanical polisher having the same. In one example, the gas pallet assembly includes three outlets and two or less inlets. The gas pallet assembl...  
WO/2024/086199A1
Silane precursors and related methods are provided. A method for preparing a silane precursor may comprise one or more of the following steps: contacting a dihalide silane compound and an amine in a first solvent to obtain a first reacti...  
WO/2024/086403A1
A vertical transport field effect transistor (VTFET) comprising: a plurality of FET structures on a substrate; the plurality of FET structures comprising: a first n-type FET structure oriented in a first plane direction relative to the s...  
WO/2024/084634A1
A semiconductor substrate comprising: a template substrate (TS) having a mask pattern (6) arranged in a first direction and that includes a mask portion (5) arranged and a first opening portion (K1); and a first semiconductor part (8A) p...  
WO/2024/083312A1
The disclosure relates to a power MOSFET device (10) having a source terminal, a drain terminal and a gate terminal. The power MOSFET device comprises a drain contact (105) formed at a bottom side (11) of the MOSFET device; a first elect...  
WO/2024/082358A1
The present disclosure relates to the field of semiconductors, and provides a semiconductor structure manufacturing method, and a semiconductor structure. The semiconductor structure manufacturing method comprises: providing a dielectric...  
WO/2024/084988A1
Provided is a rotation transmission device. The rotation transmission device comprises: a shaft body extending in a predetermined direction, a rotor, a housing, a stator, a bearing, and at least one magnetic fluid seal. At least one magn...  
WO/2024/083028A1
Provided in the embodiments of the present application is a semiconductor super-junction power device, comprising: an n-type semiconductor layer (21); a plurality of columnar insulating layers (22) recessed in the n-type semiconductor la...  
WO/2024/085752A1
A deposition device (1) is disclosed herein for depositing components (Ca, Cb,..) on a target surface (TS) of a target (T), the deposition device comprises a donor plate (3), at least one heater element (33), a power supply (6), a target...  

Matches 1 - 50 out of 817,822