PURPOSE: To make it possible to erase data electrically and selectively with ease by using non-volatile semiconductor memory in simple structure equivalent to an ultraviolet erasing method.

CONSTITUTION: A memory cell forms an N+ type source layer on the surface of a P type semiconductor substrate 1 where a first gate insulation film 4 is formed over these areas. A floating type gate electrode 5 is formed on the gate insulation film 4 and extends to a field oxide film 12. A first control gate 71 and a second control gate 72 are formed independently on the floating type gate electrode 5 on the field oxide film 12 by way of a second gate insulation film 41. During writing data, a tunnel current flows by way of a capacity coupling part 'a' where electrons are implanted into the floating gate electrode 5. During erasing data, the tunnel current flows in a capacity coupling part 'b' where the electrons captured in the floating gate electrode 5 are discharged to a first control gate electrode 71.