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Title:
COMPOUND SEMICONDUCTOR WAFER HAVING POLYCRYSTALLINE SiC SUBSTRATE, COMPOUND SEMICONDUCTOR DEVICE, AND PROCESSES FOR PRODUCING THESE
Document Type and Number:
WIPO Patent Application WO/2007/122669
Kind Code:
A1
Abstract:
A compound semiconductor device which employs a polycrystalline SiC substrate, has the high thermal conductivity of SiC, and has a buffer layer formed on the SiC substrate and having oriented crystal axes; and a process for producing the device. The process for compound semiconductor device production comprises: (a) a step in which a mask pattern having openings disposed in a stripe arrangement defined with parallel opposed sides or of a hexagonal shape having a vertex angle of 120° is formed on a polycrystalline SiC substrate, the surface of the polycrystalline SiC substrate being exposed in the openings; (b) a step in which the growth of a nitride semiconductor is initiated on those parts of the polycrystalline SiC substrate which are exposed in the openings of the mask pattern to embed the mask pattern therewith and deposit a nitride semiconductor buffer layer having a flat surface; and (c) a step in which a GaN compound semiconductor layer is grown on the nitride semiconductor buffer layer.

Inventors:
KIKKAWA TOSHIHIDE (JP)
Application Number:
PCT/JP2006/306508
Publication Date:
November 01, 2007
Filing Date:
March 29, 2006
Export Citation:
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Assignee:
FUJITSU LTD (JP)
KIKKAWA TOSHIHIDE (JP)
International Classes:
H01L21/205; H01L21/20; H01L21/338; H01L29/778; H01L29/812
Domestic Patent References:
WO1997011518A11997-03-27
WO2004112112A12004-12-23
WO1999023693A11999-05-14
Foreign References:
JP2002284600A2002-10-03
JP2002261392A2002-09-13
JP2005513799A2005-05-12
JP2005136001A2005-05-26
JP2002053398A2002-02-19
Attorney, Agent or Firm:
TAKAHASHI, Keishiro (Okachimachi Tohsei Bldg.,,3-12-1, Taito, Taito-ku, Tokyo 16, JP)
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