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JP6217737B2 |
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JP6217736B2 |
The pulse width modulator includes a subtraction unit configured to perform subtraction between an m value digital signal and a pulse width modulation signal; a feedforward filter unit configured such that a ΔΣ modulator to which an ou...
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JP6215398B1 |
[Subject] A switched capacitor circuit which can improve performance of being offset-free is provided. [Means for Solution] Capacitor 21 is connected between a non-inversed input terminal of an operational amplifier, and voltage V1, Swit...
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JP6213608B1 |
[Subject] The art in which RF signal can be made to transmit to the signal transmission way for transmitting the output of deltasigma abnormal-conditions machine is provided. [Means for Solution] Signal cable 4 is passed for deltasigma a...
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JP6203114B2 |
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JP6197824B2 |
A signal modulation circuit includes a feedback circuit configured to generate the feedback signal for feeding back a drive signal from a driver circuit to an input signal. The feedback circuit includes at least first and second resistor...
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JP2017526224A |
A method of signal processing involves comparing an input signal with one or more positive thresholds and one or more negative thresholds. The method also includes generating an output signal based on a comparison of the input signal wit...
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JP2017152968A |
To provide a ΔΣ modulator capable of maintaining an output level of a second converter stage output signal low even if an input signal is increased, and thereby capable of reducing a load of a second converter stage.In a ΔΣ modulator...
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JP6172580B2 |
An analog signal generation apparatus includes: a converter which converts an input waveform signal into a one-bit signal; a control section which, in response to a mute-off instruction, controls a pulse width time length of the one-bit ...
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JP6160604B2 |
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JP6156339B2 |
A ΔΣ modulator converts an input analog quantity into a digital value quantized with a predetermined number of bits and outputs the digital value. The ΔΣ modulator includes an integrator that includes a capacitor and integrates a dif...
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JP2017118493A |
To provide a method for quantization noise cancellation in a continuous-time multi-stage noise shaping analog-to-digital converter (CT MASH ADC).Digital quantization noise cancellation filters adaptively track transfer function variation...
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JP6147706B2 |
Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one representative embodiment, an apparatus includes multi...
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JP6132095B2 |
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JP6124016B2 |
An analog-to-digital conversion apparatus includes: a second or higher order ΔΣ analog-to-digital converter which receives input of analog data and generates a digital modulated signal including more significant bits; a cyclic analog-t...
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JP6121240B2 |
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JP6110036B2 |
A method for correcting long-term phase drift of a crystal oscillator in a numerically-controlled oscillator is described. The method includes determining the phase error in an oscillator signal in comparison with an external time base; ...
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JP6110010B2 |
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JP6106469B2 |
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JP6100085B2 |
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JP6098171B2 |
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JP6095955B2 |
successively measuring and taking in output digital codes outputted via data conversions performed, by a data converter, on the basis of ramp-waveform inputs generated on the basis of input voltage values at predetermined intervals; sele...
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JP6090441B2 |
The transmission circuit includes a comparator that converts a phase-modulated signal from an orthogonal modulator into a pulse signal so as to use the pulse signal as the sampling clock of the a delta-sigma modulator, and an asynchronou...
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JP6087332B2 |
Proposed is a digital sound system most suitable for a digital speaker device for directly converting analog sound by a circuit using a £ modulator and a mismatch shaping filter circuit to output a plurality of digital signals and a p...
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JP6085252B2 |
Architectures of SigmaDelta difference-of-squares RMS-to-digital converters employing multiple feedback paths. Additional feedback paths enable a stable SigmaDelta closed-loop behavior in different topologies where the RMS level of the q...
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JP6073907B2 |
The present invention discloses a method and device of channel equalization and beam controlling for a digital speaker array system. The method comprises the following steps: (1) converting digital format; (2) performing channel equaliza...
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JP6070654B2 |
An A/D converter includes a delta-sigma processing circuit for A/D conversion by delta-sigma modulation, and a cyclic processing circuit for A/D conversion by cyclic processing of amplification of a residue generated in the A/D conversio...
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JP6064485B2 |
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JP2016217908A |
To provide a signal processing system that causes an analog signal obtained from a sensor and the like to be received by a signal processing device of a portable terminal and the like with simpler signal processing when causing the signa...
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JP2016540451A |
Techniques for providing information near the access point (AP) are disclosed. In one example, the technique determines the first set of neighborhood information that corresponds to the signal value for the AP in the set of grid points f...
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JP2016213597A |
To suppress reduction of effect due to data weighted average processing, caused by variation in the characteristics between elements included in a circuit at the output destination of a digital output signal from a data weighted averagin...
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JP6038814B2 |
An integrated-circuit, continuous-time, sigma-delta analog-to-digital converter has a single-ended analog input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to receive ...
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JP2016197782A |
To remove noise sufficiently from transmission signals, even when the amplitude of the transmission signal is converted.A transmitter 100 includes a conversion unit 102 for converting a transmission signal having multiple quantization bi...
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JP6021090B2 |
Provided is an A/D converter including: a first integrator integrating a signal obtained by adding a first feedback signal and a third feedback signal to an analog input signal, to generate a first output signal; a first quantizer conver...
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JP6018491B2 |
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JP2016184792A |
To provide a compact ΔΣ modulator with low power consumption and high accuracy by achieving an amplification and integration circuit with a small circuit scale, while being a high dimensional ΔΣ modulator .A ΔΣ modulator including ...
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JP5980786B2 |
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JP2016152441A |
To suppress increase in power consumption when correcting AD conversion error.Subtractors Δ1, Δ2 subtract a reference signal ((Vrefp-Vrefn) or (Vrefn-Vrefp)) from analog input signals (1/2(Inp-Inn), 1/2(Inn-Inp)), and outputs arithmeti...
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JP5969692B2 |
A communication apparatus comprising an antenna for backscattering an incoming RF signal in accordance with a reflection coefficient of the antenna. The communication apparatus comprises at least one low pass delta sigma modulator which ...
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JP5958884B2 |
In the present embodiment, quantizer output values including variation values corresponding to duty errors of pulse width data (PWM output signals) occurring by the difference of the pull-down/pull-up drive characteristics (drive capabil...
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JP2016134907A |
To provide a solid-state imaging device capable of reducing the size of a pixel cell.According to an embodiment, a solid-state imaging device is provided. The solid-state imaging device includes a plurality of photoelectric conversion pa...
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JP2016134875A |
To provide an AD converter and a DA converter, with lower power consumption and having a smaller area, capable of easing required performance for an amplifier in a first stage analog integrator.An AD converter includes a delta-sigma modu...
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JP5949274B2 |
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JP5945832B2 |
An analog-to-digital conversion circuit includes: a clock generating circuit which generates a clock signal including a first initial period and plural normal periods following the first initial period, the first initial period being one...
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JP5944351B2 |
According to one embodiment, a delta/sigma modulator includes a first multiplier based on a reference capacitor having capacitance CR and a first variable capacitor having capacitance CS1 according to a distance between electrodes thereo...
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JP2016119585A |
To provide a ΔΣ modulator and a program therefor which can stabilize operation of signal processing for ΔΣ modulation even when the number of quantized values of an m-value digital signal to be input is larger than the number of quan...
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JP2016119597A |
To provide an analog-digital converter capable of performing appropriate operation even when the center frequency of an analog input signal is high.An analog-digital converter 4 comprises: a sample and hold circuit 6 to which an analog i...
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JP5935519B2 |
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JP5922316B2 |
The present invention is related to a sigma-delta analog-to-digital converter (ADC). It further relates to a method for designing and manufacturing a sigma-delta ADC, and to a digital control loop comprising the same. According to the pr...
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JP2016092498A |
To provide a signal amplification device capable of efficiently performing driving even when a load varies.A signal amplification device 1 includes an output control unit 10 for outputting pulse signals S1, S2 by using a delta-sigma modu...
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