| Document |
Document Title |
|
WO/1998/056116A2 |
A data compression apparatus is disclosed for data compressing an information signal, which is in n-level form, n being larger than 2. The data compression apparatus comprises an input terminal (1) for receiving the n-level information s...
|
|
WO/1998/056115A1 |
A method of and apparatus for the conversion of a frequency modulated signal to a digital output are disclosed. The output of the converter is a triangularly weighted sum of the number of zero crossings of the F.M. signal in each sub-sam...
|
|
WO/1998/054840A2 |
The present invention relates to an apparatus and a method for sigma-delta modulation with a reduced periodic noise (idle noise) in a sigma-delta modulator. The reduction is achieved by means of addition of two different Dither signals (...
|
|
WO/1998/053555A2 |
A digital to analogue converter comprises a plurality of current sources (T�0?-T�n?) and corresponding selection switches (D�0?-D�n?) which connect the current sources to an output (3). In order to enable a constant capacitance t...
|
|
WO/1998/049777A2 |
An adaptive delta modulator comprising an A/D-converter means controlled by a digital control signal (10) which also is applied to a drift compensation logic means (6) wherein said drift compensation logic means (6) generates a drift com...
|
|
WO/1998/049828A2 |
The invention relates to a synchronous sigma-delta modulator with a feedback loop which comprises an integrating filter followed by a polyphase sampler generating a plurality of phase shifted samples and an adder to add the plurality of ...
|
|
WO/1998/048515A1 |
An error-shaping digital-to-analog (D/A) converter system (100), consisting of a separator (102), a set of D/A converters (104, 108), a set of optional analog filters (106, 108), a summation device (112), and an optional analog filter (1...
|
|
WO/1998/047233A2 |
An analog to digital converter comprises an asynchronous sigma-delta modulator generating an asynchronous duty cycle modulated square wave, sampling means to synchronously sample the asynchronous square wave and a decimating digital filt...
|
|
WO/1998/045946A1 |
A programmable integrated circuit capacitor array includes a plurality of binarily weighted capacitors (16) and a plurality of switches (18) selectively coupling the capacitors in parallel between first and second terminals. A control ci...
|
|
WO/1998/037636A1 |
The difference d�n? between an input signal x�n? and a predicted value y�n? is adaptively quantized and encoded. The adaptive quantization is performed so that the reverse quantization value q�n? of a code L�n? for a section wh...
|
|
WO/1998/031105A1 |
An analog to digital converter converts an analog input signal (300) to at least two digital output signals (370, 380) as follows. An analog feedback signal is subtracted (310) from the analog input signal to produce a difference signal....
|
|
WO/1998/020488A2 |
A data processing apparatus is disclosed for data processing an audio signal. The data processing apparatus comprises an input terminal (1) for receiving the audio signal, a 1-bit A/D converter (4) for A/D converting the audio signal so ...
|
|
WO/1998/016014A1 |
A data compression apparatus is disclosed for data compressing an audio signal. The data compression apparatus comprises an input terminal (1) for receiving the audio signal, a 1-bit A/D converter (4) for A/D converting the audio signal ...
|
|
WO/1998/011668A1 |
In a delta sigma modulator (306), generally comprising one or more integrators (202, 204, 206, 208) fed into a multilevel quantizer (107, 210), the output of which is the output of the delta sigma modulator and is also fed through a digi...
|
|
WO/1998/011683A1 |
The present invention relates to arrangements and methods for radio frequency modulation and power amplification of an information signal (X�IF?). Modulation and amplification of the information signal (X�IF?) is carried out with ver...
|
|
WO/1998/004926A1 |
Power measurement equipment is used to calculate the momentary value of the power actually taken from a network in which both current and voltage are variable, the voltage to a lesser but perceptible extent, the current in a distinct man...
|
|
WO/1998/000923A1 |
A delta sigma modulator that has a low power dissipation without sacrificing modulator resolution includes, in one embodiment, a current mode digital to analog converter (DAC) (38) in shunt with a conventional op amp (18) in the first st...
|
|
WO/1997/049175A1 |
A signal processing circuit is provided which includes a frequency selective network (314) in a feedback loop for noise shaping purposes. A sampling analog-to-digital converter (318) in the feedback loop operates at a sampling frequency ...
|
|
WO/1997/049189A1 |
A digital noise shaper circuit is provided which includes a signal transfer function and a noise transfer function, with associated coefficients and gain scaling factors, which ensures a predetermined frequency response, signal passband ...
|
|
WO/1997/048185A1 |
A digital to analog (D/A) converter (306) for hearing aids and the like includes a delta-sigma modulator (204) and a duty cycle demodulator (208). The delta-sigma modulator converts medium rate, high resolution data (202) into medium rat...
|
|
WO/1997/042714A1 |
A noise-limiting, switched current delta-sigma modulator for use in, for example, an oversampling analog-to-digital converter. The modulator includes a first integrator having a relatively large bias current and one or more second integr...
|
|
WO/1997/033369A2 |
In a signal converter, an input signal is combined with a feedback signal in a subtracter (10). Samples of the combined signal are mapped onto a larger number of output samples by a mapper (20). According to the present invention a singl...
|
|
WO/1997/026708A1 |
A continuous-time tunable Gm-C architecture for a 'DELTA''SIGMA' modulator (10) includes a tunable resonator (18) and a low bit, high sample rate quantizer (22) connected in a feedback loop (27). The resonator shapes the quantization noi...
|
|
WO/1997/022061A1 |
Gain correction for a digital filter is accomplished by using: a multiplier (24b) for multiplying each data value by a coefficient representing the impulse response of the filter to form a convolution of the data values; and an accumulat...
|
|
WO/1997/013325A1 |
A digital oversampling noise-shaping system includes a digital noise-shaped clock signal generating circuit, including a digitally controlled oscillator (DCO) operating at a fixed master clock rate, that receives a digital input sample c...
|
|
WO/1997/006601A1 |
In multi-bit sigma-delta digital-to-analog (D/A) conversion, a highly linear switched-capacitor digital-to-analog converter (17) (DAC) in accordance with the invention is employed. The inventive DAC includes an array of holding capacitor...
|
|
WO/1996/041419A1 |
A digitally controlled oscillator in a digital phase-locked loop provides an additional output signal which indicates the time difference between clock pulses output from the digitally controlled oscillator and clock pulses of an ideal c...
|
|
WO/1996/041422A1 |
A delta-sigma modulator which converts analog signals into digital signals and maintains the linear gain relation between the analog and digital signals. The modulator is contrived by applying the over-sampling technique and the delta-si...
|
|
WO/1996/041420A2 |
Apparatus for time multiplexed oversampled analog to digital modulation is provided. Embodiments generally include a plurality of energy collection elements coupled to individual pixel processors preferably mounted proximate to each ener...
|
|
WO/1996/039739A2 |
A method and apparatus is disclosed for use in an implantable device that includes an analog-to-digital converter (ADC) for converting electrograms (such as EKG signals) into digital codes that can be stored in memory. The ADC constructe...
|
|
WO/1996/037963A1 |
A computed tomography imaging method that includes receiving an analog beam intensity signal from a computed tomography scanner and converting it into a series of digital representations at successive points in time. An indication that a...
|
|
WO/1996/034465A1 |
The invention concerns a device comprising: a voltage/frequency converter (3 to 7) which receives the input voltage and emits pulses of a frequency proportional to this voltage; an electro-optical converter (8) which transforms the elect...
|
|
WO/1996/031943A2 |
In a receiver two sigma delta modulators (13, 19) are used to convert a pair of analog quatradure signals into digital quadrature signals. In such sigma delta modulators the quantisation noise is shifted into a frequency region in which ...
|
|
WO/1996/028893A1 |
A balanced delta-modulation analog-to-digital conversion circuit is disclosed. A first principal integrator produces a first output signal which rises when a first control signal is generated and falls when a second control signal is gen...
|
|
WO/1996/028885A1 |
A method for processing a signal modulated with information symbols to account for an additive offset and slope is disclosed. First, an inital estimate of offset and slope is made and hypotheses of all possible values of a sequence of on...
|
|
WO/1996/028889A2 |
A method and apparatus for phase locking to an input signal and outputting a sigma-delta modulated control signal. The method and apparatus of the present invention provide a sigma-delta modulated control signal which can be utilized by ...
|
|
WO/1996/028892A1 |
A method and apparatus for digital-to-analog conversion using sigma-delta modulation of the temporal spacing between digital samples are provided. The method and apparatus include sigma-delta modulation of the time-base such that errors ...
|
|
WO/1996/025795A1 |
An apparatus receives a reference clock (805) signal that is then applied to a first one of a number of series-connected controllable delay stages (903-1...903-5). The output of each delay stage is a further delayed version of its input,...
|
|
WO/1996/025800A1 |
An over-sampling type A/D converter whose sampling frequency is higher than the frequency of the signal at the final stage. The area occupied by the chips and the power consumption are not increased even though the order of integration f...
|
|
WO/1996/025793A1 |
An active current steering semi-digital FIR filter for a digital-to-analog conversion circuit, which includes a shift register having a 1-bit digital input stream and a plurality of output taps, where each output tap provides a 1-bit sig...
|
|
WO/1996/018242A1 |
This invention includes a second and a fourth-order sigma-delta modulator system having one-half unit delay integrators and feedback.
|
|
WO/1996/016482A1 |
A method and apparatus for analog-to-digital conversion using sigma-delta modulation of the temporal spacing between digital samples are provided. The method and apparatus include sigma-delta modulation of the time-base such that errors ...
|
|
WO/1996/015484A2 |
A monolithic integrated circuit for providing enhanced audio performance in personal computers is disclosed. The monolithic circuit includes a wavetable synthesizer; a full function stereo coding and decoding circuit (CODEC) including an...
|
|
WO/1996/013903A1 |
The present invention relates to a periodically integrating analog-to-digital converter and a sensor device comprising such a converter. The analog-to-digital converter comprises a measured-value-to-pulse-amount converter, i.e. a sigma-d...
|
|
WO/1996/008865A2 |
A quadrature modulator for generation of complex modulated signals includes a unique pair of balanced, low-pass filters which, through a switching arrangement for switching into and out of the circuit distributed RC line sections and cor...
|
|
WO/1996/001525A1 |
Digital frequency demodulation is accomplished by monitoring similar transitions in an FM radio signal to determine frequency. Time intervals between similar transitions in the FM signal are established by selecting anticipated transitio...
|
|
WO/1995/034955A1 |
The invention relates to an oversampled high-order modulator, especially a sigma-delta modulator, comprising cascaded integrators (H1, H2, ...HN) in a number corresponding to the order of the modulator, a quantizer (15), and a negative f...
|
|
WO/1995/034134A1 |
A switched-capacitor DAC system includes an integrator circuit including an op amp (60) having an input lead (62, 64), an output lead (66, 68) and an integrator capacitor (C3, C4) connected between the input lead and the output lead. A s...
|
|
WO/1995/026079A1 |
A circuit for conditioning and digitising an analogue signal (x(t)) comprises a regulator circuit which is in the form of a delta modulator and comprises a comparator (1), a clocked flip-flop (2), a digital accumulator (3) and a digital-...
|
|
WO/1995/024077A1 |
A sigma-delta A/D converter (301) having a digital logic gate core. The converter is comprised of a loop filter (304) for shaping the converter's quantization noise spectrum. The loop filter is comprised of an unbuffered CMOS logic gate ...
|
