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Patent Searching and Data


Matches 151 - 200 out of 39,207

Document Document Title
WO/2018/204462A3
System and method of timing recovery using calibration logic to correct non-idealities related to phase interpolation. The calibration logic includes a Look-Up Table (LUT) preloaded with a set of expected output phases of the phase inter...  
WO/2018/214856A1
Disclosed are a method and device for data processing. The method may comprise: shifting output data in a current SERDES output clock cycle into a cache of a pre-set length; determining a reference position in current cache data accordin...  
WO/2018/214138A1
The present application provides a method, a device, a transmitter, and a receiver for detecting syncwords. After inserting syncwords in a data frame to be transmitted, a transmitter transmits the data frame to be transmitted inserted wi...  
WO/2018/217783A1
Multi-mode non-return-to-zero (NRZ) and orthogonal differential vector signaling (ODVS) clock and data recovery circuits having configurable sub-channel multi-input comparator (MIC) circuits for forming a composite phase-error signal fro...  
WO/2018/214606A1
Disclosed are a clock process method and apparatus, and a PTP device. The clock process method in the embodiments of the present disclosure comprises: calculating a time deviation according to an extracted timestamp; correcting, by means...  
WO/2018/167145A3
Exemplary embodiments provide a data transmitter for transmitting data to a data receiver, individual communication information being known to the data transmitter and data receiver. The data transmitter is designed to generate an indivi...  
WO/2018/211761A1
An on-board communication device mounted in a vehicle, wherein the on-board communication device is provided with: a storage unit for storing a first encryption time, which is the time required to encrypt data in another on-board communi...  
WO/2018/209314A1
Systems and methods for synchronizing the clocks of a central device and one or more destination devices are disclosed. In some embodiments the central device and destination devices are implemented in a space-based or high-altitude asse...  
WO/2018/202038A1
Disclosed in the present invention are an uplink synchronization timing deviation determination method and device, for solving the problem in the prior art that a base station in an NB-IoT system has low accuracy in determining an uplink...  
WO/2018/204462A2
System and method of timing recovery using calibration logic to correct non-idealities related to phase interpolation. The calibration logic includes a Look-Up Table (LUT) preloaded with a set of expected output phases of the phase inter...  
WO/2018/204010A1
An apparatus is provided which comprises: a data slicer to receive first data sampled by a data clock; an edge slicer to receive second data sampled by an edge clock; and a Least Mean Square (LMS) circuitry coupled to the data and edge s...  
WO/2018/204459A1
System and method of timing recovery for recovering a clock signal with reduced interference with clock phase correction by an adaptive equalizer. The equalizer in the timing recovery loop is dynamically adapted to the current channel ch...  
WO/2018/196600A1
Provided are a method and device for configuring a link group. The method comprises: a first device acquiring first state information about M links between a source end device and a receiving end device, where the first state information...  
WO/2018/197011A1
A method of frame synchronization comprises receiving a stream of bits, the stream comprising a sequence of frames, wherein each frame comprises a frame counter value representing the number of the frame in the sequence, and frame check ...  
WO/2018/196223A1
The embodiments of the present invention disclose a data processing method and a relevant device for improving the accuracy of a system time difference between time systems in a time synchronization system. The method in the embodiments ...  
WO/2018/200373A1
A device may include an input for receiving information communicated from a host to the device and a controller configured to recover a device reference clock on the device, the device reference clock proportional to a host reference clo...  
WO/2018/187018A1
A source device and a sink device may be connected using an interface cable comprising at least first and second physical channels. The first physical channel may be used to transmit video data unidirectionally from the source device to ...  
WO/2018/185121A1
The invention relates to a method for forming a digital value from a clock signal (101) and from a digital data signal (102), wherein the clock signal (101) is scanned in order to obtain a clock signal digital value sequence, wherein the...  
WO/2018/179920A1
[Problem] To control delay time with high accuracy. [Solution] A delayed locked loop circuit provided with: a first delay circuit that comprises at least one first delay device and at least one second delay device, the first delay device...  
WO/2018/182662A1
An apparatus for interpolating between a first and a second signal is provided. The apparatus includes a plurality of interpolation cells coupled to a common node of the apparatus. Further, the apparatus includes a control circuit config...  
WO/2018/179165A1
A motion controller (1) according to the present invention is provided with a calculation unit (11) that generates a position command for each calculation period, which is shorter than a communication period in synchronous communication,...  
WO/2018/182907A1
Examples provide a modulation circuit and apparatus, a demodulation circuit and apparatus, a transmitter, a receiver, a system, a radio frequency circuit, a mobile terminal, and methods and computer programs for modulating and demodulati...  
WO/2018/179066A1
[Problem] To provide a broadcast wave synchronization signal converting device that synchronizes broadcast waves with GNSS signals on a reception side and corrects the broadcast waves to global standard times by use of correction values,...  
WO/2018/093600A3
A method of encoding a stream of data bits includes encoding a bit 1 of the data stream as a first symbol if a bit immediately preceding the bit 1 is encoded as 0 and a bit of the data stream immediately succeeding the bit 1 is 0, encodi...  
WO/2018/173623A1
A single-line serial data transmission circuit having a master circuit 1 and a slave circuit 4, the master circuit 1 having a data clock adder 2 for writes and a data receiver 3 for reads. The slave circuit 4 has an active generator 5, a...  
WO/2018/169979A1
In one implementation, a receiver has a module to calculate the cross-correlation between a portion of a digital representation of a received signal and a reference signal. The receiver also has a module to generate an estimate of a port...  
WO/2018/167145A2
Exemplary embodiments provide a data transmitter for transmitting data to a data receiver, individual communication information being known to the data transmitter and data receiver. The data transmitter is designed to generate an indivi...  
WO/2018/169988A1
In one implementation, a receiver has a module to detect a carrier within a portion of a digital representation of a received signal. In addition, the receiver includes a module to calculate the cross-correlation between the portion of t...  
WO/2018/167984A1
A wireless communication device (20) comprises an antenna (21), a transmission unit (221), a reception unit (222), a demodulation unit (236), a detection unit (235), and an adjustment unit (231). The transmission unit transmits a transmi...  
WO/2018/004764A3
This disclosure describes systems, methods, and devices related to enhanced fine timing measurement protocol negotiation. A device may identify an enhanced fine timing measurement request received from a first device, the enhanced fine t...  
WO/2018/161282A1
The present disclosure provides a clock synchronization method and apparatus and a passive optical network system, pertaining to the technical field of optical networks. The method is applicable to a first optical network unit (ONU) in a...  
WO/2018/162973A1
A method includes receiving first and second media units with respective first and second time stamps that are assigned based on a first clock cycle time and a data transmission rate. The method includes assigning an adjusted time stamp ...  
WO/2018/160465A1
Aspects of the embodiments are directed to a data transmission receiver that includes a neural network circuit for resolving a received bit value. The data transmission receiver can be coupled to a data transmitter by a high speed data l...  
WO/2018/159411A1
[Problem] To provide a feature, in a transfer system for conforming synchronization methods of a transmission device and a reception device, for appropriately synchronizing the transmission side and the reception side. [Solution] A pilot...  
WO/2018/157088A1
In a radio using a plurality of channels defined in a radio frequency (RF) spectrum, a rate of false packet detections may be calculated for each of the plurality of channels using a plurality of respective correlation thresholds. The ra...  
WO/2017/171487A3
Provided is a synchronization method and apparatus in a wireless communication system. A synchronization method according to an aspect of the present disclosure may include: receiving a first synchronization signal and a second synchroni...  
WO/2018/148864A1
Provided are a clock synchronization method and device, which relate to the technical field of communications and solve the problem of user data information being interrupted when an existing CDMA system implements clock synchronization....  
WO/2018/144207A1
Systems and methods for adjusting a phase step size of a clock data recover (CDR) circuit are described according to aspects of the present disclosure. In certain aspects, a method for adjusting a phase step size of a CDR circuit include...  
WO/2018/143854A1
A first wireless device and a method therein for performing sidelink communication when operating in a first coverage area of a wireless communications network. The first wireless device is capable of using information obtained from a na...  
WO/2018/097418A3
The present invention relates to a method for synchronization of slave devices and, more specifically, to a method for synchronization of a plurality of slave devices which are connected to a master device in a multi-drop configuration a...  
WO/2018/132142A1
Methods, systems, and apparatuses, including computer programs encoded on a computer-readable storage medium for providing improved network services to service members are described. A first set of network devices associated with a servi...  
WO/2018/128851A2
Technology for a next generation node B (gNB) operable to measure crosslink signal-to-interference ratio (SINR) in a dynamic time division duplex (TDD) new radio (NR) system is disclosed. The gNB can encode a downlink interference measur...  
WO/2018/125232A1
Aspects of a digital phase-lock loop (DPLL) with an adjustable delay between an output clock and a reference clock in accordance with phase noise compensation are generally described herein. An apparatus may include processing circuitry ...  
WO/2018/120549A1
Disclosed is a method for processing a time stamp in an EPON, the method comprising: detecting a delay in an MPCP packet passing through a PCS and a delay in same passing through an MAC coding layer; acquiring a first time stamp carried ...  
WO/2018/120173A1
Provided is a method for exchanging a time synchronisation message. The method comprises: a network device exchanging a clock synchronisation message with a first clock source, wherein the network device comprises a boundary clock; the n...  
WO/2018/123857A1
In the present invention, when a data collection terminal slave device (2) receives a dummy packet the data collection terminal slave device appends to a return packet a timestamp indicating the reception time of the dummy packet and a t...  
WO/2018/118261A1
Disclosed is a method of synchronization signal correlation, comprising receiving a synchronization signal ("SS") on a plurality of receive antennas; performing a signal revision on the SS received on a first receive antenna, the signal ...  
WO/2018/117005A1
The purpose of the present invention is to improve data quality by reducing the influence of jitter or noise in a series of processes from oversampling to demodulation of a data bit string, and performing a correct data decoding process ...  
WO/2018/112903A1
Disclosed in the present application is a clock synchronization method, relating to the field of communication technologies. The method comprises: acquiring a first sequence, the first sequence being a part of a to-be-received sequence o...  
WO/2018/108837A1
The invention relates to a method for the detection, by a receiver device, of a pulse of a signal received by said receiver device, said received signal corresponding to data emitted with a predetermined period Tc, each data item being e...  

Matches 151 - 200 out of 39,207