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WO/2001/079990A1 |
A mixed signal processing unit with non-linear feedforward paths (36, 38) to improve total harmonic distortion 'THD' and noise characteristics of the processor. Specifically the processor includes a first integrator stage (14) configured...
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WO/2001/071922A2 |
A high-performance delta sigma analog-to-digital converter (90). The high-performance delta sigma analog-to-digital converter (90) includes a first mechanism (12, 52, 38, 16, 92) for converting an input analog signal (26) to a digital ou...
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WO/2001/069876A1 |
In order to reduce the effect of mismatch in the I and Q paths of a quadrature device, which may be, for example, a mixer or a sigma-delta modulator, the data on the paths are swapped at high speed.
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WO/2001/065732A2 |
A system and method for increasing the performance of a digital return path in a hydrid-fiber-coax television system using baseband serial optical transport, receives an analog composite return path waveform at a comparator input to a di...
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WO/2001/063771A1 |
A sensor for determining at least one parameter with a sigma-delta-converter (1) has connected input and feedback capacitors (Cf1, Cf2, Crefc1, Crefc2, Creff1, Creff2, Crt1, Crt2, Cr1, Cr2, Ctemp1, Ctemp2, Cs1, Cs2). At least one of the ...
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WO/2001/063770A1 |
An analog to digital converter includes a delta sigma modulator (103) that produces a stream of pulses (104) whose density represents the amplitude of an analog input signal (Vin). A decimation filter (105) is coupled to filter the strea...
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WO/2001/061864A1 |
An improved technique for processing digital audio signals is provided wherein adaptation of predictor coefficients in an ADPCM environment is caused to converge in a rapid and computationally efficient manner. The technique (fig. 2) emp...
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WO/2001/061865A1 |
Summarizing, the present invention provides an IVC (100), comprising an operational amplifier (110) with an inverting input (112) and an output (113), and a feedback resistor ladder network (120) coupled between the output (113) and the ...
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WO/2001/060006A1 |
A combined filter and digital-to-analog converter (DAC) provides an integrated apparatus for converting a digital data stream into a filtered analog signal. The combined filter/DAC implements an N-tap digital filter using a serial shift ...
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WO/2001/059928A1 |
The invention relates to a balanced circuit arrangement for converting an asymmetric analogous input signal (S1) into a symmetrical output signal (S2, S3). A first amplifier (2) is provided, whereby the non-inverting input thereof is con...
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WO/2001/059932A1 |
The invention relates to a method for converting an analogous input signal (S1) into a digital output signal (S7). The analogous input signal (S1) is amplified in a first signal path (2, 3, 5) and is subject to an analog-to-digital conve...
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WO/2001/050611A2 |
A delta sigma modulator which uses at least one quantizer having a dead zone. The dead zone quantizer outputs a zero when its input is within the dead zone range. It outputs a predetermined value if the input is above the dead zone range...
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WO/2001/045268A1 |
An oversampling circuit and a digital/analog converter which have small circuit scales and the component costs of which are reduced. The oversampling circuit comprises a multiplying section (1), four data holding sections (2-1 to 2-4), f...
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WO/2001/045269A1 |
An oversampling circuit and a digital/analog converter which have small circuit scales and the component costs of which are reduced. Data inputted at predetermined intervals is multiplied by four multiplicators by means of a multiplier (...
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WO/2001/045266A1 |
A digital/analog converter for producing an output waveform having lens distortion without increasing the operating speed of components. A D/A converter comprises four D flip-flops (10-1 to 10-4), four multipliers (12-1 to 12-4), three a...
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WO/2001/045270A1 |
A digital/analog converter which produces an output waveform having less distortion without increasing the operating speed of the components. The D/A converter comprises a multiplying section (1), four data holding sections (2-1 to 2-4),...
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WO/2001/045267A1 |
An oversampling circuit and a digital/analog converter which have small circuit scales and the component costs of which are reduced. The oversampling circuit comprises four D flip-flops (10-1 to 10-4), four multipliers (12-1 to 12-4), th...
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WO/2001/038943A1 |
A feedback control system for 1-bit digital signal processing comprises different operation means (23) for calculating the difference between the input from an external device (22) and the measured variable measured by sensing means (25)...
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WO/2001/039377A2 |
A FIRDAC (20) is described, coupled to a noise-shaper (12) with a DC offset. The resulting offset of the FIRDAC itself is compensated by a compensation current source (P¿comp?; N¿comp?) which is continuously ON. The FIRDAC has a plural...
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WO/2001/037461A1 |
To generate a high-power modulated radio frequency (RF) signal (S¿OUT?) from an input low or medium frequency information signal (S¿IN?) the information signal is pulse-shaped in a quantifier (108) to form a digital signal (S¿D?) havi...
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WO/2001/028094A1 |
A technique for compensating for supply voltage variations in a delay circuit by utilizing a bias circuit to maintain the delay substantially constant with respect to the supply voltage.
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WO/2001/028103A1 |
A technique for shifting a common mode voltage in a modulator comprised of a plurality of differential stages, so that downstream stages can use a lower voltage drive than the first stage of the modulator.
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WO/2001/026416A2 |
The invention concerns an audio receiver system comprising: a modulator (1) for modulating a first digital audio signal with a first factor and a second digital audio signal with a second factor greater than the first, said second signal...
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WO/2001/022582A1 |
A circuit arrangement and method utilize a programmable shifter (48, 88) coupled downstream of a multiplier (36, 86) to shift the product of an input value and a pre-scaled filter coefficient that implements a predetermined filter functi...
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WO/2001/018972A2 |
The invention relates to a circuit arrangement for generating in-phase input signals for a 1-bit digital-analog converter. The 1-bit digital-analog converter has at least one pair of differential inputs and corresponding outputs, switch ...
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WO/2001/011787A2 |
The invention relates to a sigma-delta A/D converter, comprising at least one analog signal input (1, 2) for applying an analog input signal, a subtraction mechanism (3) that has multiple capacitors (20) which are used for sampling the i...
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WO/2001/011786A1 |
A delta-sigma modulator (325) having a downconverter mixer circuit (30) in the forward path of the modulator circuit and an upconverter mixer (38) in the feedback path of the modulator. The modulator (325) consists of a loop filter havin...
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WO/2001/011785A2 |
The invention concerns a cascade sigma-delta modulator, in particular for converting discrete sampling values in time into corresponding analog signals, in radiocommunication receiver devices. The respective error signal of a sigma-delta...
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WO/2001/010033A2 |
The invention relates to an analog-to-digital converter for a signal in the gigahertz range, to a millimetric wave receiver comprising the inventive analog-to-digital converter for a signal in the gigahertz range and to a bandpass filter...
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WO/2001/010017A1 |
Methods and apparatus are described for reducing or eliminating break-before-make, i.e. dead time distortion, in switching amplifiers. A switching amplifier (M1, M2) has an input stage (510) for generating a switching signal. Break-befor...
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WO/2001/010035A1 |
A Sigma-Delta modulator(10) comprises a signal input (34) coupled to a forward filter comprising a series connection of a plurality of N summing stages (28, 30, 32), where N is an integer of at least 2, alternating with a corresponding p...
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WO/2001/008311A1 |
The invention relates to a clock signal generator that comprises a DDS circuit (1) that adds a frequency word (N_coarse) to a defined frequency (Fc_coarse) and, in the case of an overflow, generates an output pulse. The aim of the invent...
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WO/2001/005037A2 |
The invention relates to an adaptive differential sigma-delta modulator, wherein delta is adapted to the input and/or output signal. Basically, the invention introduces a new approach within the field of sigma-delta converters, as the in...
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WO/2001/003303A2 |
A system and method creating a highly efficient digital amplifier which can take either analog or digital inputs, and produce a high power accurate representation of the input to drive speakers or other low impedance load is described. T...
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WO/2001/003312A1 |
A multi-standard digital receiving apparatus adaptable to reception of a service from among a plurality of services comprises in cascade an input analog section (11), an analog-to-digital converter (12) and a digital signal-treatment sec...
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WO/2001/001578A1 |
The invention concerns a method for compensating the non-linearity of a sigma-delta analog-to-digital converter (A2) with quantization at N levels comprising a digital-to-analog converter (24). The method comprises a calibrating step whi...
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WO/2000/079706A1 |
A wireless receiver receives a wireless signal by inverting the polarity (78) of an incoming waveform on every one half clock cycle of a conversion clock to produce a commutated waveform and converting said commutated waveform to a serie...
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WO/2000/069074A1 |
Modulators formed by nested arrangements of lower order modulator stages with feedback of the overall output to the input. An error signal output by each stage forms an input to the next. The feedback of overall output preferably include...
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WO/2000/069078A1 |
The invention relates to a sigma-delta analog/digital converter array comprising two cascading sigma-delta modulators (1, 2), wherein both sigma-delta modulators (1, 2) are multibit sigma-delta modulators. The sigma-delta analog/digital ...
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WO/2000/065713A2 |
Sample rate converters are known, and are used to convert a signal with a first sample rate (sampling frequency) into a signal with a second sample rate (sampling frequency). To obtain a flexible sample rate converter with sampling frequ...
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WO/2000/065723A1 |
Sigma-delta analog-to-digital converter topology with an error signal branch including a subtractor (10), a loop filter (4), and a quantizer (6), and a feedback branch including a digital-to-analog converter (8). The gain error caused by...
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WO/2000/065537A1 |
To determine interpolated intermediate values of a sampled signal, for example a digital mobile telephone signal, the parameters a, b and c of the second-degree polynomial y = ax?2¿ + bx + c are determined from three known sampling valu...
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WO/2000/060745A1 |
A hybrid loop filter (100) includes an integrator (114) having an input and an output wherein the output forms an output of the hybrid loop filter, a plurality of transconductance amplifiers (130-1....130-n) having an input and an output...
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WO/2000/060326A1 |
A method and a system for phase sensitive rectification of signals from transducers driven by an AC excitation signal will be disclosed. The method and system demand a very moderate calculation capacity, thereby to facilitate the use of ...
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WO/2000/059111A1 |
Converters are used to convert a digital signal into an analogue signal or vice versa. In audio reproduction systems oversampled converters are used in combination with a digital upsampling low pass filter followed by either an analogue ...
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WO/2000/057549A1 |
An analog-to-digital converter responsive to an analog signal converts the analog signal to a digital signal. A digital decimation filter, having an associated frequency response, is responsive to the digital signal for producing a decim...
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WO/2000/057558A2 |
The invention relates to a 1-bit digital-analogue converter circuit comprising outputs, switching units and pulse shaping units. Said outputs, switching units and pulse shaping units are decoupled from one another by decoupling units. Th...
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WO/2000/055977A1 |
A radio receiver comprises frequency translation means (20, 21, 22) for frequency down converting an input signal to an intermediate signal, digital channel selection filtering means including at least one analogue-to-digital converter(A...
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WO/2000/055966A1 |
The digital amplifier of the present invention comprises a delta sigma noise shaper (111) feeding a pulse wave modulator (112) which drives a load (119) such as a speaker. The amplifier includes circuitry to measure the voltage (120, 121...
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WO/2000/052867A1 |
A system for reducing sensitivity of an integrated circuit chopper-stabilized amplifier to intermodulation applies a pseudo-random sequence signal (11A) to an LSB of a first input of a first adder. An error feedback (18) is applied to a ...
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