| Document |
Document Title |
|
JPH02106733U |
|
|
JPH0237136B2 |
|
|
JPH02206222A |
PURPOSE: To simplify the constitution of a transmission line of a count enable signal and to decrease the time from a change in the count enable signal till the confirmation of data input to a flip-flop by providing a selector between a ...
|
|
JPH02201538A |
PURPOSE: To perform various operations and to simplify the circuit constitution by reading out input data twice with a set signal and a count signal. CONSTITUTION: This counter consists of latch circuits 8 to 11, an OR circuit 12, full a...
|
|
JPH02196520A |
PURPOSE: To facilitate considerably the test of an electronic circuit using a frequency division clock in the electronic circuit incorporated with a clock frequency divider circuit by using a reset terminal of toggle flip-flop circuits c...
|
|
JPH02502420A |
A D-type, master/slave, flip-flop is described for use as a divide-by-2 frequency divider in which a frequency to be divided is input as a clock signal and the &upbar& Q output is connected to the D input, and in which the master section...
|
|
JPH02193414A |
PURPOSE: To prevent a whisker-shaped pulse from being superposed on an output signal by providing 1st and 2nd synchronous counters, utilizing enable input terminals effectively, and controlling enable inputs with the output signals of th...
|
|
JPH02192225A |
PURPOSE: To facilitate the change in the count method and to improve the general-purpose application by using a storage element so as to apply input control to a flip-flop. CONSTITUTION: Outputs from flip-flops 2-5 are all zero in the in...
|
|
JPH0233211B2 |
|
|
JPH0293840U |
|
|
JPH02189026A |
PURPOSE: To simplify the circuit constitution by having only to supervise the state of two bits being a sign bit and the most significant bit(MSB) of a count of a counter to detect overflow and underflow of the counter. CONSTITUTION: Wit...
|
|
JPH02188026A |
PURPOSE: To preclude malfunction in up/down switching by providing a delay circuit composed of a logic circuit, and delaying a 2nd clock pulse by a period which is an integer multiple of a 1st clock pulse with an up/down switching signal...
|
|
JPH02186718A |
PURPOSE: To obtain the output of a 1/3 frequency division whose duties of a high level and a low level are equal, by installing plural master slave FF fetching data at the change of rising or falling of a clock, an OR gate and the like. ...
|
|
JPH0232595B2 |
|
|
JPH02185131A |
PURPOSE: To obtain a counter device which sets plural different initial values without using selector circuits and is operated by setting at least one input terminal of a counter circuit to a fixed value and using the output signal of an...
|
|
JPH02183626A |
PURPOSE: To obtain a variable frequency divider circuit whose frequency division value changes continuously in a range of total frequency division value NP+ A≥P2-P by devising a circuit such that a frequency division value varied conti...
|
|
JPH02184113A |
PURPOSE: To obtain a frequency divider output having a 50% duty ratio and synchronously with the leading of a reference signal with simple constitution even when any frequency divider ratio is set and even when a reset signal rises at an...
|
|
JPH02181519A |
PURPOSE: To obtain a frequency dividing circuit driven by an applied frequency dividing rate by combining a rate multiplexer and an N-frequency dividing counter to constitute the circuit and controlling the N-frequency dividing counter b...
|
|
JPH02181518A |
PURPOSE: To automatically raise a ring counter and to automatically repair it at the time of its malfunction by providing the ring counter circuit with a counter control part or the like for outputting a count start signal to the initial...
|
|
JPH02182015A |
PURPOSE: To constitute a gate logic stacked longitudinally while withstanding the dispersion in component by employing an enhancement Schottky field effect TR for a drive TR, using its gate as an input terminal and using its drain as an ...
|
|
JPH0230209B2 |
A frequency divider is provided by coupling the gate current paths of a pair of Josephson junction gate circuits in parallel with the control current path of a third Josephson junction gate circuit being connected in series with the gate...
|
|
JPH02172320A |
PURPOSE: To simplify the constitution and to attain high speed operation by applying logic arithmetic operation based on the output of a prescribed data flip-flop of a pseudo random signal generating circuit using plural data flip-flops ...
|
|
JPH02170721A |
PURPOSE: To stably operate the title circuit without a malfunction when the reset of prescaler with reset function in canceled by reset-canceling a T type flip flop(TFF) on a stage other than an initial stage before the reset cancellatio...
|
|
JPH02170720A |
PURPOSE: To always make constant the synchronous time of a phase locked loop(PLL) by holding a latch enable(LE) signal by means of a flip flop(F/F) circuit, obtaining the synchronization with a reference frequency dividing signal, and tr...
|
|
JPH0228926B2 |
PURPOSE:To reduce the variance of clocks and the skew of the clocks having respective phases by forming a means for executing the previously determined logical operation of an output from a prescribed stage of the 1st shift register and ...
|
|
JPH02164127A |
PURPOSE: To provide a high speed counter capable of reducing its power consumption by constituting the counter of plural counter cells mutually connected and capable of supplying outputs respectively in response to 1st and 2nd clock sign...
|
|
JPH02161823A |
PURPOSE: To count high frequencies by catching and storing the magnetic flux quantum at every input signal and converting the total magnetic flux quantum into the digital value of plural bits and performing an operation so as to set the ...
|
|
JPH02159821A |
PURPOSE: To apply frequency division to the output signal of an oscillator without multiplication and less frequency divider stage and to attain the output of a frequency division signal equivalent to the multiplied frequency by providin...
|
|
JPH0227854B2 |
|
|
JPH0279632U |
|
|
JPH02148913A |
PURPOSE: To simplify the circuit constitution by outputting an output pulse from an adder when it overflows and using the result of addition of the adder when the output pulse is outputted as an added value of a numerator outputted to th...
|
|
JPH0273189U |
|
|
JPH0224055B2 |
|
|
JPH0223873B2 |
|
|
JPH0268528U |
|
|
JPH02132918A |
PURPOSE: To shorten the set-up time of a modulus control signal, and to obtain the output of high speed by taking out the output of a variable frequency divider from the inverted output of the leading edge trigger type DFF of the final s...
|
|
JPH02131619A |
PURPOSE: To prevent mis-setting by shifting a numeral of a blink digit to upper digit through the operation of a shift key and making a blink digit in existence at all times to the least significant digit, and setting a desired numeral a...
|
|
JPH02130024A |
PURPOSE: To latch counter data at the time when a counter latch instruction is inputted by constituting the title circuit of a D flip flop, a NAND gate and an SR latch. CONSTITUTION: When a counter clock CK is in a low level when the cou...
|
|
JPH0266032U |
|
|
JPH02128520A |
PURPOSE: To obtain a pulse counter having a high limit frequency unrelated with the number of stages by back-coupling a shift register between an input edge and an output edge, connecting the common clock line of all the shift registers ...
|
|
JPH0264236U |
|
|
JPH0221698B2 |
A variable resolution counter is provided in which the resolution of the count decreases as the counted value increases. A set of scale control bits from the most significant bits of the counter are used to control selection of one of se...
|
|
JPH0221177B2 |
|
|
JPH02125527A |
PURPOSE: To realize frequency division by a multiple of a fraction number in the unit of 0.5 by using a clock input and a shifted data so as to activate a set priority flip-flop (R-SF, F). CONSTITUTION: When an initial data '0' is shifte...
|
|
JPH0220175B2 |
|
|
JPH02119430A |
PURPOSE: To attain the length count of an elastic material by providing a means revising a count object set by the user at a desired rate of change and using the result of multiplying the rate of change with a preset prescale value if th...
|
|
JPH02113618A |
PURPOSE: To reduce an area and power consumption as compared with an existing frequency divider by using a frequency dividing cell for an IC. CONSTITUTION: This frequency dividing cell is provided with power units A1, D4, R9, a pair of c...
|
|
JPH02113625A |
PURPOSE: To enhance a maximum operation frequency by connecting the maximum order counter output of a synchronization type binary counter to a presetting control terminal. CONSTITUTION: An input device 4, in which a presetting control te...
|
|
JPH0255740U |
|
|
JPH02108326A |
PURPOSE: To latch a counter value when a counter latch instruction is inputted by providing a one-shot circuit and a timing control circuit. CONSTITUTION: A one-shot circuit 11 outputs an 'L' one-shot pulse f1 for the delay time portion ...
|
